Power semiconductor package

A power semiconductor package comprising:

• a first substrate assembly which comprises a plurality of power semiconductor dies;
• a second substrate assembly which is arranged substantially parallel to the first substrate assembly, the second substrate assembly comprising a copper cladding layer which defines a source copper cladding layer circuit which comprises a bonding area which is configured to be mechanically contacted so as to provide an electrical connection to the source copper cladding layer circuit;
• and
• a plurality of source contacts each of which provides an electrical connection between a source connection of one of the plurality of power semiconductor dies of the first substrate assembly and the source copper cladding layer circuit of the second substrate assembly, the plurality of source contacts being arranged at different distances from the bonding area of the source copper cladding layer circuit,
• wherein,
• the source copper cladding layer circuit further comprises an electrically isolating slot which is arranged between a source contact of the plurality of source contacts which is closest to the bonding area of the source copper cladding layer circuit and the bonding area of the source copper cladding layer circuit.