H10W 20/0884
Involving forming vias by burying sacrificial pillars in the dielectric parts and
Official title: {involving forming vias by burying sacrificial pillars in the dielectric parts and removing the pillars}
H10W20/0884 (Involving forming vias by burying sacrificial pillars in the dielectric parts and) appears on 99 US grants and 90 published applications in this corpus.
Search patents in H10W- Granted patents
- 99
- Published applications
- 90
- Assignees
- 44
- Inventors
- 222
- Latest grant
- 10 Feb 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1993 | 1 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 2 | 0 |
| 1999 | 3 | 0 |
| 2000 | 7 | 0 |
| 2001 | 7 | 2 |
| 2002 | 8 | 7 |
| 2003 | 4 | 4 |
| 2004 | 2 | 6 |
| 2005 | 3 | 2 |
| 2006 | 2 | 3 |
| 2007 | 2 | 3 |
| 2008 | 2 | 2 |
| 2009 | 3 | 1 |
| 2010 | 0 | 0 |
| 2011 | 0 | 0 |
| 2012 | 0 | 0 |
| 2013 | 0 | 3 |
| 2014 | 2 | 3 |
| 2015 | 1 | 0 |
| 2016 | 3 | 4 |
| 2017 | 4 | 5 |
| 2018 | 4 | 6 |
| 2019 | 4 | 7 |
| 2020 | 7 | 10 |
| 2021 | 10 | 9 |
| 2022 | 5 | 4 |
| 2023 | 4 | 4 |
| 2024 | 5 | 3 |
| 2025 | 3 | 2 |
| 2026 | 1 | 0 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
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Most cited
By later US patents
- Process for producing semiconductor integrated circuit device206US 7,553,756 B2Hitachi, Ltd. · 2009
- Trenching techniques for forming channels, vias and components in substrates116US 5,219,787 AMicroelectronics and Computer Technology Corporation · 1993
- Dual damascene structure80US 6,033,977 ASiemens Aktiengesellschaft · 2000
- Method to form, and structure of, a dual damascene interconnect device70US 6,252,290 B1Chartered Semiconductor Manufacturing Ltd. · 2001
- Method for forming vias and trenches in an insulation layer for a dual-damascene multilevel interconnection structure60US 6,096,655 AInternational Business Machines Corporation · 2000