H10D 30/6735
Having gates fully surrounding the channels
Official title: {having gates fully surrounding the channels, e.g. gate-all-around}
H10D30/6735 (Having gates fully surrounding the channels) appears on 6,018 US grants and 9,647 published applications in this corpus.
Search patents in H10D- Granted patents
- 6,018
- Published applications
- 9,647
- Assignees
- 357
- Inventors
- 5,690
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 1 | 0 |
| 1993 | 0 | 0 |
| 1994 | 1 | 0 |
| 1995 | 2 | 0 |
| 1996 | 6 | 0 |
| 1997 | 1 | 0 |
| 1998 | 3 | 0 |
| 1999 | 4 | 0 |
| 2000 | 1 | 0 |
| 2001 | 1 | 0 |
| 2002 | 2 | 5 |
| 2003 | 6 | 8 |
| 2004 | 11 | 16 |
| 2005 | 11 | 30 |
| 2006 | 13 | 31 |
| 2007 | 19 | 38 |
| 2008 | 31 | 47 |
| 2009 | 22 | 24 |
| 2010 | 30 | 42 |
| 2011 | 41 | 76 |
| 2012 | 48 | 46 |
| 2013 | 67 | 66 |
| 2014 | 83 | 119 |
| 2015 | 120 | 204 |
| 2016 | 260 | 301 |
| 2017 | 360 | 405 |
| 2018 | 385 | 412 |
| 2019 | 440 | 410 |
| 2020 | 385 | 468 |
| 2021 | 416 | 532 |
| 2022 | 425 | 838 |
| 2023 | 453 | 1244 |
| 2024 | 638 | 1470 |
| 2025 | 917 | 1981 |
| 2026 | 814 | 834 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor memory devices with dielectric fin structures6 Oct 2026US 12,755,790 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Selective deposition of gate dielectric layer of semiconductor device and the semiconductor device manufactured thereby6 Oct 2026US 12,757,424 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Conductive bridge through dielectric wall between source or drain contacts6 Oct 2026US 12,757,439 B2Intel Corporation
- Semiconductor structure and method for forming the same6 Oct 2026US 12,757,440 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Contact formation with staggered gate patterning6 Oct 2026US 12,757,441 B2International Business Machines Corporation
- Semiconductor structure and method for manufacturing the same8 Oct 2026US 2026/0313867 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Multi-channel ferroelectric memory structure8 Oct 2026US 2026/0313908 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Three dimensional semiconductor device with memory stack8 Oct 2026US 2026/0313917 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device and manufacturing method thereof8 Oct 2026US 2026/0313928 A1National Taiwan University
- Controlled doping in a gate dielectric layer8 Oct 2026US 2026/0313932 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- FINFETs with wrap-around silicide and method forming the same1,436US 9,608,116 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Vertical gate all around (VGAA) transistors and methods of forming the same1,029US 9,502,265 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Vertical gate all around (VGAA) devices and methods of manufacturing the same987US 9,536,738 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Aligned gate-all-around structure849US 9,412,828 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Nanowire field effect transistor device having a replacement gate849US 9,472,618 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016