Nanowire field effect transistor device having a replacement gate
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorRichard Kenneth Oxland
Life of this patent
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Abstract
One embodiment of the instant disclosure provides a transistor device that comprises: a semiconductor substrate; a buffer layer formed in a fin structure over the semiconductor substrate; a nanowire formed over the buffer layer, having at least a middle portion suspended over the buffer layer by an undercutting, the nanowire including a source and a drain region respectively defined at distal portions thereof and a channel region defined in the suspended portion of the nanowire and connecting the source and drain regions; and a gate structure surrounding at least a portion of the suspended portion of the nanowire.
Claims18
A transistor device, comprising:
- a semiconductor substrate;
- a buffer layer formed over the semiconductor substrate;
- a nanowire formed over the buffer layer and having a pair of distal portions, the nanowire including
- source and drain regions respectively defined at the distal portions of the nanowire and
- a channel region connecting the source and drain regions of the nanowire;
- a gate structure surrounding the nanowire;
- and
- a remnant of a sacrificial layer between the buffer layer and the nanowire, wherein the gate structure and the remnant of the sacrificial layer define a distance L therebetween and the distance L determines a degree to which areas of the source region or the drain region are electrically isolated from the buffer layer.
A transistor device comprising:
- a semiconductor substrate;
- a buffer layer formed over the semiconductor substrate;
- a nanowire formed over the buffer layer, and including a channel region, and a source region and a drain region connected by the channel region;
- a gate region surrounding the nanowire;
- and
- a remnant of a sacrificial layer between the buffer layer and the nanowire, wherein the gate region and the remnant of the sacrificial layer define a distance L therebetween and the distance L is such that a potential barrier between the source region or the drain region and the buffer layer is higher than an operation voltage of the transistor device.
A transistor device comprising:
- a semiconductor substrate;
- a buffer layer formed over the semiconductor substrate;
- a nanowire formed over the buffer layer, and including a channel region, and a source region and a drain region connected by the channel region;
- and
- a gate surrounding the nanowire and including a high-k dielectric layer, wherein a ratio of the thickness of the high-k dielectric layer to the width of the channel region is such that a potential barrier between the source region or the drain region and the buffer layer is higher than an operation voltage of the transistor device;
- a remnant of a non-silicon semiconductor layer between the buffer layer and the nanowire, wherein the gate structure and the remnant of the non-silicon semiconductor layer define a distance L therebetween and the distance L determines a degree to which areas of the source region or the drain region are electrically isolated from the buffer layer.
Dependencies are inferred from the claim text.