G11C 5/06
Arrangements for interconnecting storage elements electrically
Official title: Arrangements for interconnecting storage elements electrically, e.g. by wiring
G11C5/06 (Arrangements for interconnecting storage elements electrically) appears on 5,558 US grants and 5,989 published applications in this corpus.
Search patents in G11C- Granted patents
- 5,558
- Published applications
- 5,989
- Assignees
- 615
- Inventors
- 7,372
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 3 | 0 |
| 1980 | 6 | 0 |
| 1981 | 6 | 0 |
| 1982 | 6 | 0 |
| 1983 | 12 | 0 |
| 1984 | 9 | 0 |
| 1985 | 10 | 0 |
| 1986 | 6 | 0 |
| 1987 | 9 | 0 |
| 1988 | 11 | 0 |
| 1989 | 8 | 0 |
| 1990 | 13 | 0 |
| 1991 | 18 | 0 |
| 1992 | 19 | 0 |
| 1993 | 16 | 0 |
| 1994 | 22 | 0 |
| 1995 | 24 | 0 |
| 1996 | 28 | 0 |
| 1997 | 31 | 0 |
| 1998 | 62 | 0 |
| 1999 | 70 | 0 |
| 2000 | 78 | 0 |
| 2001 | 104 | 43 |
| 2002 | 107 | 109 |
| 2003 | 87 | 79 |
| 2004 | 89 | 87 |
| 2005 | 67 | 125 |
| 2006 | 81 | 127 |
| 2007 | 102 | 145 |
| 2008 | 110 | 134 |
| 2009 | 104 | 163 |
| 2010 | 125 | 146 |
| 2011 | 125 | 155 |
| 2012 | 140 | 159 |
| 2013 | 193 | 221 |
| 2014 | 240 | 249 |
| 2015 | 248 | 248 |
| 2016 | 309 | 200 |
| 2017 | 258 | 209 |
| 2018 | 204 | 261 |
| 2019 | 243 | 268 |
| 2020 | 286 | 343 |
| 2021 | 318 | 411 |
| 2022 | 324 | 429 |
| 2023 | 351 | 414 |
| 2024 | 345 | 372 |
| 2025 | 346 | 393 |
| 2026 | 183 | 499 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Memory device6 Oct 2026US 12,755,773 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Storage device and method of controlling storage device6 Oct 2026US 12,755,785 B2Kioxia Corporation
- Memory device having 2-transistor vertical memory cell and a common plate29 Sep 2026US 12,751,272 B2Micron Technology, Inc.
- Three-dimensional memory array and preparation method thereof22 Sep 2026US 12,744,062 B2Peking University
- Apparatus and methods for modifying impedances in time-based vector-matrix multiplication circuits15 Sep 2026US 12,738,322 B2SanDisk Technologies LLC
- Memory device and method for manufacturing the same8 Oct 2026US 2026/0311729 A1Macronix International Co., Ltd.
- Semiconductor device and method of manufacturing semiconductor device8 Oct 2026US 2026/0311730 A1SK hynix Inc.
- Memory device8 Oct 2026US 2026/0311751 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Ternary content-addressable memory cells and methods for forming the same8 Oct 2026US 2026/0311760 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Method for manufacturing semiconductor memory device including a bit line mask pattern8 Oct 2026US 2026/0313871 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Segmented column memory array801US 5,315,541 ASunDisk Corporation · 1994
- Solid state memory system including plural memory chips and a serialized bus546US 5,430,859 ASunDisk Corporation · 1995
- Semiconductor memory device with dummy word line/sense amplifier activation436US 4,435,793 ATokyo Shibaura Denki Kabushiki Kaisha · 1984
- Apparatus for synchronously generating clock signals in a data processing system430US 5,243,703 ARambus Inc. · 1993
- Datapath architecture for high area efficiency428US 7,054,178 B1Etron Technology, Inc. · 2006