G11C 2211/561
Multilevel memory cell aspects
G11C2211/561 (Multilevel memory cell aspects) appears on 370 US grants and 202 published applications in this corpus.
Search patents in G11C- Granted patents
- 370
- Published applications
- 202
- Assignees
- 126
- Inventors
- 516
- Latest grant
- 16 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 1 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 2 | 0 |
| 1989 | 3 | 0 |
| 1990 | 3 | 0 |
| 1991 | 7 | 0 |
| 1992 | 10 | 0 |
| 1993 | 7 | 0 |
| 1994 | 7 | 0 |
| 1995 | 5 | 0 |
| 1996 | 15 | 0 |
| 1997 | 12 | 0 |
| 1998 | 33 | 0 |
| 1999 | 29 | 0 |
| 2000 | 17 | 0 |
| 2001 | 25 | 6 |
| 2002 | 21 | 14 |
| 2003 | 14 | 11 |
| 2004 | 9 | 16 |
| 2005 | 9 | 9 |
| 2006 | 11 | 6 |
| 2007 | 3 | 10 |
| 2008 | 5 | 4 |
| 2009 | 1 | 10 |
| 2010 | 8 | 4 |
| 2011 | 4 | 3 |
| 2012 | 2 | 5 |
| 2013 | 5 | 7 |
| 2014 | 10 | 6 |
| 2015 | 5 | 4 |
| 2016 | 4 | 5 |
| 2017 | 4 | 8 |
| 2018 | 5 | 8 |
| 2019 | 10 | 17 |
| 2020 | 20 | 16 |
| 2021 | 16 | 12 |
| 2022 | 8 | 5 |
| 2023 | 7 | 6 |
| 2024 | 7 | 6 |
| 2025 | 2 | 4 |
| 2026 | 2 | 0 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
- G11C 2211/5615Multilevel magnetic memory cell using non-magnetic non-conducting interlayerIndexing code96
- G11C 2211/5614Multilevel memory cell comprising negative resistance, quantum tunneling or resonance tunneling elementsIndexing code87
- G11C 2211/5612Multilevel memory cell with more than one floating gateIndexing code85
- G11C 2211/5613Multilevel memory cell with additional gates, not being floating or control gatesIndexing code43
- G11C 2211/5611Multilevel memory cell with more than one control gateIndexing code32
- G11C 2211/5616Multilevel magnetic memory cell using non-magnetic conducting interlayerIndexing code25
- G11C 2211/5617Multilevel rom cell programmed by source, drain or gate contactingIndexing code12
Recent patents
- Semiconductor device, method of fabricating semiconductor device, and semiconductor structure having semiconductor device16 Jun 2026US 12,660,203 B2Taiwan Semiconductor Manufacturing Company.Ltd
- MRAM device with annular electrodes31 Mar 2026US 12,593,614 B2International Business Machines Corporation
- Semiconductor device and method for fabricating the same26 Aug 2025US 12,402,540 B2United Microelectronics Corp.
- Semiconductor device and method for fabricating the same25 Mar 2025US 12,262,647 B2United Microelectronics Corp.
- Back-side memory element with local memory select transistor10 Dec 2024US 12,167,612 B2International Business Machines Corporation
- Semiconductor device and method for fabricating the same6 Nov 2025US 2025/0344611 A1United Microelectronics Corp.
- Topological Racetrack Memory having Multi-bits Storage Capability Each Unit Cell for In-memory Computing in Artificial Intelligent Inference Device30 Oct 2025US 2025/0338504 A1Aurora Micro Devices LLC
- Semiconductor device and method for fabricating the same12 Jun 2025US 2025/0194436 A1United Microelectronics Corp.
- Storage device20 Mar 2025US 2025/0095729 A1Kioxia Corporation
- Method for fabricating semiconductor device10 Oct 2024US 2024/0341102 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Highly compact EPROM and flash EEPROM devices819US 5,095,344 A1992
- Flash EEPROM memory systems having multistate storage cells579US 5,043,940 A1991
- Multigate semiconductor device with vertical channel current and method of fabrication396US 6,580,124 B1Matrix Semiconductor, Inc. · 2003
- Monolithic three dimensional array of charge storage devices containing a planarized surface361US 6,881,994 B2Matrix Semiconductor, Inc. · 2005
- Multigate semiconductor device with vertical channel current and method of fabrication307US 6,677,204 B2Matrix Semiconductor, Inc. · 2004