Back-side memory element with local memory select transistor

A method of fabricating a memory device, the method comprising:

• forming, on a first side of a semiconductor wafer, an intermediate layer comprising a semiconductor material;
• forming, on the first side of the semiconductor wafer, a semiconductor device on a first surface of the intermediate layer, the semiconductor device including at least one gate structure and a first source/drain region;
• forming, on the first side of the semiconductor wafer, a buried insulator layer on an opposing second surface of the intermediate layer and on an upper surface of the first source/drain region;
• forming, on a second side of the semiconductor wafer opposite the first side, an electrically conductive via/contact having a first electrically conductive end and a second electrically conductive opposite the first electrically conductive end, the electrically conductive via/contact extending through the buried insulator layer and the intermediate layer such that first electrically conductive end directly contacts the first S/D region to establish an electrically conductive connection therewith;
• depositing an interlayer dielectric (ILD) on the buried insulator layer so as to encapsulate the electrically conductive via/contact;
• etching the ILD to expose a surface of the electrically conductive via/contact;
• forming, on the second side of the semiconductor wafer, a memory storage element that contacts the second electrically conductive end of the electrically conductive via/contact;
• depositing, on an upper surface of the buried insulator layer, a memory stack insulating film that conforms to exposed surfaces of the memory storage element;
• depositing, on an upper surface of the memory stack insulating film, a second side ILD that encapsulates the memory storage element and the memory stack insulating film;
• etching a portion of the second side ILD and the memory stack insulating film so as to expose an upper portion of the memory storage element;
• and
• forming a bit line directly on the exposed upper portion of the memory storage element.