G11C 11/4096
Input/output [i/o] data management or control circuits
Official title: Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
G11C11/4096 (Input/output [i/o] data management or control circuits) appears on 3,390 US grants and 3,215 published applications in this corpus.
Search patents in G11C- Granted patents
- 3,390
- Published applications
- 3,215
- Assignees
- 417
- Inventors
- 3,772
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 8 | 0 |
| 1977 | 6 | 0 |
| 1978 | 2 | 0 |
| 1979 | 2 | 0 |
| 1980 | 2 | 0 |
| 1981 | 3 | 0 |
| 1982 | 6 | 0 |
| 1983 | 7 | 0 |
| 1984 | 3 | 0 |
| 1985 | 6 | 0 |
| 1986 | 10 | 0 |
| 1987 | 12 | 0 |
| 1988 | 18 | 0 |
| 1989 | 12 | 0 |
| 1990 | 19 | 0 |
| 1991 | 19 | 0 |
| 1992 | 9 | 0 |
| 1993 | 23 | 0 |
| 1994 | 46 | 0 |
| 1995 | 27 | 0 |
| 1996 | 33 | 0 |
| 1997 | 48 | 0 |
| 1998 | 50 | 0 |
| 1999 | 52 | 0 |
| 2000 | 56 | 0 |
| 2001 | 50 | 25 |
| 2002 | 52 | 68 |
| 2003 | 52 | 41 |
| 2004 | 40 | 49 |
| 2005 | 37 | 62 |
| 2006 | 51 | 67 |
| 2007 | 59 | 73 |
| 2008 | 63 | 65 |
| 2009 | 46 | 68 |
| 2010 | 55 | 47 |
| 2011 | 52 | 49 |
| 2012 | 52 | 65 |
| 2013 | 60 | 60 |
| 2014 | 67 | 70 |
| 2015 | 84 | 89 |
| 2016 | 124 | 111 |
| 2017 | 140 | 157 |
| 2018 | 165 | 141 |
| 2019 | 185 | 199 |
| 2020 | 204 | 172 |
| 2021 | 192 | 217 |
| 2022 | 183 | 268 |
| 2023 | 210 | 330 |
| 2024 | 274 | 292 |
| 2025 | 253 | 250 |
| 2026 | 161 | 180 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Apparatuses and methods for compute enabled cache6 Oct 2026US 12,754,849 B2
- Automatic adaptive signaling over a pin of an integrated circuit device6 Oct 2026US 12,755,767 B2Micron Technology, Inc.
- Semiconductor device6 Oct 2026US 12,757,369 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Physical unclonable function device and method29 Sep 2026US 12,748,896 B2STMicroelectronics (Rousset) SAS
- Semiconductor memory device and controller for reading data with improved speed, and method of operating the semiconductor memory device and the controller29 Sep 2026US 12,749,526 B2SK hynix Inc.
- Memory device and memory module including the same8 Oct 2026US 2026/0311742 A1Samsung Electronics Co., Ltd.
- Peripheral circuit and memory device including the same8 Oct 2026US 2026/0311743 A1Samsung Electronics Co., Ltd.
- Semiconductor device8 Oct 2026US 2026/0311745 A1Semiconductor Energy Laboratory Co.Ltd.
- Memory device and method of operation thereof8 Oct 2026US 2026/0311746 A1Samsung Electronics Co., Ltd.
- Compute in memory (cim) memory array8 Oct 2026US 2026/0311748 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Hierarchical DRAM array with grouped I/O lines and high speed sensing circuit467US 5,638,317 ATexas Instruments Incorporated · 1997
- Dynamic random access memory device with low-power consumption column selector431US 5,473,576 ANEC Corporation · 1995
- Apparatus for synchronously generating clock signals in a data processing system430US 5,243,703 ARambus Inc. · 1993
- Data amplifier having reduced data lines and/or higher data rates429US 6,950,898 B2Micron Technology, Inc. · 2005
- Apparatuses and methods for performing compare operations using sensing circuitry422US 8,964,496 B2Micron Technology, Inc. · 2015