Dynamic random access memory device with low-power consumption column selector
AssigneeNEC Corporation
InventorYoshinori Matsui
Life of this patent
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Abstract
A column selector of a dynamic random access memory device is implemented by a plurality of switching circuits for transferring a potential difference from a sense amplifier to a shared data line pair, and one of the switching circuits selectively discharge the data lines of the pair to a ground voltage line for transferring the potential difference to the shared data line pair, wherein a potential control circuit is coupled between the switching circuits and the ground voltage line for decreasing the current flowing from the data line to the ground voltage line after production of an output data signal, thereby decreasing the current consumption.
Claims5
A semiconductor memory device comprising:
- a) a plurality of addressable memory cells for storing data bits;
- b) a plurality of pairs of first data lines selectively coupled to said plurality of addressable memory cells;
- c) a first addressing system for selectively connecting said plurality of addressable memory cells to said plurality of pairs of first data lines;
- d) second data lines paired with each other;
- e) a charging circuit coupled to said second data lines for supplying current thereto;
- f) a discharging line for discharging said current;
- g) a second addressing system having a plurality of switching circuits coupled in parallel between said second data lines and said discharging line, one of said plurality of switching circuits being responsive to a data bit on one of said plurality of pairs of first data lines for selectively connecting said second data lines to said discharging line, thereby transferring said data bit to said second data lines in the form of potential difference;
- h) an interface responsive to said data bit on said second data lines for producing a data signal;
- and
- i) a current control means operative to increase the current flowing from said discharging line to a voltage source for enlarging the potential difference between said second data lines before said interface produces said data signal and to decrease said current after completion of the production of said data signal, said current control means including
- i-1) a diode coupled between said discharging line and said voltage source;
- and
- i-2) a switching transistor coupled between said discharging line and said voltage source in parallel to said diode, and responsive to a control signal so as to provide a current path before said interface produces said data signal, said control signal being changed to an inactive level after said completion of the production of said data signal so that said switching transistor turns off.
Dependencies are inferred from the claim text.