Back to results
US 12,754,849 B2Granted
Apparatuses and methods for compute enabled cache
OwnerRichard C. Murphyinventor
Life of this patent
Estimating the term…
Abstract
An example apparatus may include a compute component, a memory and a controller coupled to the memory. The controller may be configured to operate on a block select and a sub-row select as metadata to a cache line to control placement of the cache line in the memory to allow for a compute enabled cache.
Claims20
An apparatus, comprising:
- a memory configured to store cache data and having:
- a memory array;
- a plurality of compute components to perform logical operations;
- and
- a memory controller coupled to the memory array, the memory controller configured to:
- create a first select as metadata to a cache line to control alignment of the cache line to one or more of the plurality of compute components.
3 more elements
An apparatus, comprising:
- an array of memory cells;
- a plurality of compute components configured to perform logical operations;
- and
- a memory controller coupled to the array and the plurality of compute components, the memory controller configured to:
- receive a cache line having a first select metadata and a second select metadata;
- and
- operate on the first select metadata and the second select metadata to control alignment of the cache line to one or more of the plurality of compute components for processing.
4 more elements
A method for operating a cache memory, comprising:
- creating a first select as metadata to a cache line to control alignment of cache blocks in a memory array of the cache memory comprising a plurality of compute components to perform logical operations;
- and
- creating a second select as metadata to the cache line to control placement of at least a portion of the cache line on a particular row in the memory array to align the portion of the cache line to one or more of the plurality of compute components.
Dependencies are inferred from the claim text.