Apparatuses and methods for performing compare operations using sensing circuitry
AssigneeMicron Technology, Inc.
InventorTroy A. Manning
Life of this patent
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Abstract
The present disclosure includes apparatuses and methods related to performing compare and/or report operations using sensing circuitry. An example method can include charging an input/output (IO) line of a memory array to a voltage. The method can include determining whether data stored in the memory array matches a compare value. The determination of whether data stored matches a compare value can include activating a number of access lines of the memory array. The determination can include sensing a number of memory cells coupled to the number of access lines. The determination can include sensing whether the voltage of the IO line changes in response to activation of selected decode lines corresponding to the number of memory cells.
Claims31
A method of performing a compare function, comprising:
- charging an input/output (IO) line of a memory array to a voltage;
- determining whether data stored in the memory array matches a compare value by:
- activating a number of access lines of the memory array;
- sensing a number of memory cells coupled to the number of access lines;
- and
- sensing, via a secondary sense amplifier, whether the voltage of the IO line changes in response to activation of selected decode lines corresponding to the number of memory cells.
An apparatus comprising:
- an array of memory cells;
- control circuitry coupled to the array and configured to cause:
- precharging of a local input/output (LIO) line of the array to a precharge voltage;
- and
- selective activation of access lines and decode lines of the array;
- and
- sensing circuitry coupled to the array and configured to:
- sense a number of selected memory cells coupled to an activated access line;
- and
- determine, using a secondary sense amplifier, whether the precharge voltage of the LIO line changes in response to activation of decode lines corresponding to the number of selected memory cells.
An apparatus comprising:
- an array of memory cells;
- control circuitry coupled to the memory array and configured to cause a charging of an input/output (IO) line of the memory array to a voltage;
- and
- sensing circuitry coupled to the memory array and comprising:
- a number of primary sense amplifiers coupled to respective pairs of complementary sense lines;
- a number of accumulators coupled to the number of primary sense amplifiers:
- a secondary sense amplifier coupled to the IO line and configured to sense whether the voltage of the IO line changes in response to activation of selected decode lines of the array to determine whether data stored in the array matches a compare value.
An apparatus comprising:
- an array of memory cells;
- control circuitry coupled to the array and configured to, as part of a compare operation:
- cause precharging of a local input/output (LIO) line of the array to a precharge voltage;
- cause selective activation of access lines of the array;
- and
- cause selective activation of decode lines of the array;
- and
- sensing circuitry coupled to the array and configured to:
- sense memory cells coupled to a plurality of selectively activated access lines;
- and
- sense, using a secondary sense amplifier, whether the precharge voltage of the LIO line changes in response to selective activation of a plurality of the decode lines corresponding to the memory cells;
- wherein a determination that the precharge voltage changes in response to the selective activation of the plurality of column decode lines indicates that at least one of the memory cells coupled to the plurality of selectively activated access lines stores a data value that matches a compare value.
Dependencies are inferred from the claim text.