G01R 31/3187
Built-in tests
G01R31/3187 (Built-in tests) appears on 600 US grants and 591 published applications in this corpus.
Search patents in G01R- Granted patents
- 600
- Published applications
- 591
- Assignees
- 238
- Inventors
- 1,358
- Latest grant
- 8 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1993 | 1 | 0 |
| 1994 | 0 | 0 |
| 1995 | 2 | 0 |
| 1996 | 0 | 0 |
| 1997 | 2 | 0 |
| 1998 | 2 | 0 |
| 1999 | 4 | 0 |
| 2000 | 1 | 0 |
| 2001 | 8 | 5 |
| 2002 | 12 | 17 |
| 2003 | 35 | 34 |
| 2004 | 21 | 21 |
| 2005 | 19 | 16 |
| 2006 | 18 | 25 |
| 2007 | 25 | 20 |
| 2008 | 26 | 21 |
| 2009 | 16 | 22 |
| 2010 | 21 | 17 |
| 2011 | 17 | 8 |
| 2012 | 11 | 19 |
| 2013 | 16 | 24 |
| 2014 | 22 | 28 |
| 2015 | 29 | 35 |
| 2016 | 35 | 32 |
| 2017 | 34 | 22 |
| 2018 | 23 | 25 |
| 2019 | 24 | 29 |
| 2020 | 28 | 21 |
| 2021 | 30 | 27 |
| 2022 | 26 | 26 |
| 2023 | 32 | 27 |
| 2024 | 23 | 30 |
| 2025 | 20 | 18 |
| 2026 | 17 | 22 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Self-correcting pattern detection architecture8 Sep 2026US 12,730,151 B1Cadence Design Systems, Inc.
- State clearing of internal memory and flip-flops of a system using built-in test and scan circuitry8 Sep 2026US 12,730,940 B2Microsoft Technology Licensing, LLC
- Seamless universal verification methodology1 Sep 2026US 12,724,070 B1Amazon Technologies, Inc.
- Logic built-in self-test (LBIST) circuit for authenticity validation25 Aug 2026US 12,717,890 B1Synopsys, Inc.
- Apparatus and test element group4 Aug 2026US 12,699,136 B2Micron Technology, Inc.
- Wrapper Cell Design and Built-In Self-Test Architecture for 3DIC Test and Diagnosis8 Oct 2026US 2026/0309778 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Glitch-free reset testing system17 Sep 2026US 2026/0276708 A1STMicroelectronics International N. V.
- Microcontroller-assisted self-test for processors10 Sep 2026US 2026/0266904 A1International Business Machines Corporation
- Method and system for testing three-dimensional semiconductor devices27 Aug 2026US 2026/0251710 A1Marvell Asia Pte Ltd
- Semiconductor integrated circuit and electronic control unit20 Aug 2026US 2026/0243824 A1Astemo, Ltd.
Most cited
By later US patents
- Method and apparatus for evaluating and optimizing a signaling system146US 7,490,275 B2Rambus Inc. · 2009
- Integrated circuit having built-in self-test features108US 7,800,389 B2Allegro MicroSystems, LLC · 2010
- Semiconductor memory self-test controllable at board level using standard interface106US 6,681,359 B1Cypress Semiconductor Corporation · 2004
- Built-in self repair circuitry utilizing permanent record of defects104US 6,651,202 B1LSI Logic Corporation · 2003
- Testing methodology for embedded memories using built-in self repair and identification circuitry102US 6,367,042 B1LSI Logic Corporation · 2002