Built-in self repair circuitry utilizing permanent record of defects
AssigneeLSI Logic Corporation
InventorTuan L. Phan
Life of this patent
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AssigneeLSI Logic Corporation
InventorTuan L. Phan
Estimating the term…
An integrated circuit includes built-in self test (BIST) and built-in self repair (BISR) circuitry, a fuse array capable of storing information related to defective memory locations identified during the manufacturing process. During manufacture, the integrity of the embedded memory of the integrated circuit is tested under a variety of operating conditions via the BIST/BISR circuitry. The repair solutions derived from these tests are stored and compiled in automated test equipment. If the repair solutions indicate that the embedded memory is repairable, the on-chip fuse array of the integrated circuit is programmed with information indicative of all of the detected defective memory locations. The built-in self repair circuitry of the integrated circuit is not executed upon power up. Instead, the repair information stored in the fuse array is provided to address remap circuitry within the BISR circuit. When an access to one of these memory locations is attempted during normal operation of the integrated circuit, the BISR circuitry remaps the memory operation to a redundant memory element.
A method for providing fault information to an integrated circuit for purposes of performing built-in self repair, the integrated circuit having a built-in self test circuit, a built-in self repair circuit and a non-volatile storage circuit capable of providing repair information to the built-in self repair circuit, the method comprising the steps of:
A method for providing fault information to an integrated circuit for purposes of performing built-in self repair, the integrated circuit having a built-in self test circuit, a built-in self repair circuit and a non-volatile storage circuit capable of providing repair information to the built-in self repair circuit, the method comprising the steps of:
A method for providing fault information to an integrated circuit and performing corresponding built-in self repair operations, the integrated circuit having a built-in self test circuit, a built-in self repair circuit and a non-volatile storage circuit capable of providing repair information to the built-in self repair circuit, the method comprising the steps of:
A method for providing fault information to an integrated circuit for purposes of performing built-in self repair, the integrated circuit having a built-in self test circuit, a built-in self repair circuit and a non-volatile storage circuit capable of providing repair information to the built-in self repair circuit, the method comprising the steps of:
Dependencies are inferred from the claim text.