Microcontroller-assisted self-test for processors

A computer-implemented method comprising:

• storing a packaged test content on a file system embedded on a chip;
• reading, by a microcontroller embedded on the chip, the packaged test content;
• performing, by the microcontroller, a test of an integrated circuit embedded on the chip according to a test configuration read from the packaged test content;
• determining, by the microcontroller, fail condition of the test and appending the fail condition to a data structure;
• repeating the performing of the test, determining and appending of the fail condition until all desired integrated circuits have been tested as specified;
• and
• communicating, by the microcontroller, the data structure to a device external to the chip.

A computer program product comprising:

• one or more computer-readable storage media;
• and
• program instructions stored on the one or more storage media to perform operations comprising:
• storing packaged test content on a file system embedded on a chip;
• reading, by a microcontroller embedded on the chip, the packaged test content;
• performing, by the microcontroller, a test of an integrated circuit embedded on the chip according to test specification read from the packaged test content;
• determining, by the microcontroller, status of the test and appending the status to a data structure;
• repeating the performing of the test, determining and appending of the status until all desired integrated circuits have been tested as specified;
• and
• communicating, by the microcontroller, the data structure to a device external to the chip.

A computer program product comprising:

• one or more computer-readable storage media;
• and
• program instructions stored on the one or more storage media to perform operations comprising:
• storing a packaged test content on a file system embedded on a chip;
• reading, by a microcontroller embedded on the chip, the packaged test content;
• performing, by the microcontroller, a test of an integrated circuit embedded on the chip according to a test configuration read from the packaged test content;
• determining, by the microcontroller, fail condition of the test and appending the fail condition to a data structure;
• repeating the performing of the test, determining and appending of the fail condition until all desired integrated circuits have been tested as specified;
• and
• communicating, by the microcontroller, the data structure to a device external to the chip.

A computer system comprising:

• a processor set;
• a set of one or more computer-readable storage media;
• program instructions, collectively stored in the set of one or more computer-readable storage media, for causing the processor set to perform the following computer operations:
• storing packaged test content on a file system embedded on a chip;
• reading, by a microcontroller embedded on the chip, the packaged test content;
• performing, by the microcontroller, a test of an integrated circuit embedded on the chip according to test specification read from the packaged test content;
• determining, by the microcontroller, status of the test and appending the status to a data structure;
• repeating the performing of the test, determining and appending of the status until all desired integrated circuits have been tested as specified;
• and
• communicating, by the microcontroller, the data structure to a device external to the chip.