G01R 31/318572
Input/output interfaces
Official title: {Input/Output interfaces}
G01R31/318572 (Input/output interfaces) appears on 897 US grants and 767 published applications in this corpus.
Search patents in G01R- Granted patents
- 897
- Published applications
- 767
- Assignees
- 213
- Inventors
- 1,153
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 2 | 0 |
| 1987 | 4 | 0 |
| 1988 | 4 | 0 |
| 1989 | 2 | 0 |
| 1990 | 2 | 0 |
| 1991 | 7 | 0 |
| 1992 | 5 | 0 |
| 1993 | 3 | 0 |
| 1994 | 3 | 0 |
| 1995 | 10 | 0 |
| 1996 | 13 | 0 |
| 1997 | 18 | 0 |
| 1998 | 10 | 0 |
| 1999 | 13 | 0 |
| 2000 | 14 | 0 |
| 2001 | 9 | 4 |
| 2002 | 11 | 22 |
| 2003 | 15 | 26 |
| 2004 | 32 | 35 |
| 2005 | 19 | 39 |
| 2006 | 35 | 29 |
| 2007 | 42 | 43 |
| 2008 | 35 | 29 |
| 2009 | 37 | 38 |
| 2010 | 48 | 34 |
| 2011 | 41 | 41 |
| 2012 | 39 | 33 |
| 2013 | 43 | 51 |
| 2014 | 45 | 37 |
| 2015 | 47 | 32 |
| 2016 | 33 | 31 |
| 2017 | 35 | 40 |
| 2018 | 29 | 21 |
| 2019 | 26 | 18 |
| 2020 | 17 | 23 |
| 2021 | 27 | 27 |
| 2022 | 21 | 25 |
| 2023 | 34 | 36 |
| 2024 | 34 | 26 |
| 2025 | 22 | 19 |
| 2026 | 9 | 8 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Secure scan testing of integrated circuits25 Aug 2026US 12,716,945 B2SK hynix Inc.
- Addressable test access port4 Aug 2026US 12,699,134 B2Texas Instruments Incorporated
- Wrapper cell design and built-in self-test architecture for 3DIC test and diagnosis21 Jul 2026US 12,687,578 B2Taiwan Semiconductor Manufacturing Company.Ltd
- System and method for schedule-based I/O multiplexing for integrated circuit (IC) scan test14 Jul 2026US 12,681,084 B1Marvell Asia Pte Ltd
- Integrated circuit with multiplexer for testing16 Jun 2026US 12,656,397 B2Samsung Electronics Co., Ltd.
- Wrapper Cell Design and Built-In Self-Test Architecture for 3DIC Test and Diagnosis8 Oct 2026US 2026/0309778 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Scan test in a single-wire bus circuit3 Sep 2026US 2026/0259263 A1Qorvo US, Inc.
- Semiconductor integrated circuit20 Aug 2026US 2026/0243823 A1Canon Kabushiki Kaisha
- Test network reset circuits2 Jul 2026US 2026/0186055 A1Intel Corporation
- Secure scan testing of integrated circuits28 May 2026US 2026/0147041 A1SK hynix Inc.
Most cited
By later US patents
- Microcontroller provided with hardware for supporting debugging as based on boundary scan standard-type extensions210US 5,590,354 AU. S. Philips Corporation · 1996
- Multiplexed-access scan testable integrated circuit142US 4,602,210 AGeneral Electric Company · 1986
- Method and apparatus for interrogating electronic equipment components133US 8,829,934 B2Scanimetrics Inc. · 2014
- Jtag testing of buses using plug-in cards with Jtag logic mounted thereon101US 5,852,617 ASamsung Electronics Co., Ltd. · 1998
- Led printhead and driver chip for use therewith having boundary scan test architecture101US 5,859,657 AEastman Kodak Company · 1999