Scan test in a single-wire bus circuit
AssigneeQorvo US, Inc.
InventorsJames Mark Robert Bloom, Christopher Truong Ngo
Life of this patent
Estimating the term…
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AssigneeQorvo US, Inc.
InventorsJames Mark Robert Bloom, Christopher Truong Ngo
Estimating the term…
A Scan test in a single-wire bus circuit is described in the present disclosure. The single-wire bus circuit has one or more external pins for connecting to a single-wire bus. Given that multiple physical pins are required to carry out the Scan test, the single-wire bus circuit must provide additional pins required by the Scan test. In embodiments disclosed herein, the single-wire bus circuit includes a communication circuit under test and a driver circuit coupled to the communication circuit via multiple internal pins. The driver circuit uses a subset of the internal pins as input pins and another subset of the internal pins as output pins in order to carry out the Scan test in the communication circuit. A mini-telegram is sent at the beginning of the Scan test along with common bus values. This reduces the time required to perform the scan test.
A slave circuit comprising:
A single-wire bus circuit comprising:
Dependencies are inferred from the claim text.