G01R 31/318561
Identification of the subpart
Official title: {Identification of the subpart}
G01R31/318561 (Identification of the subpart) appears on 53 US grants and 40 published applications in this corpus.
Search patents in G01R- Granted patents
- 53
- Published applications
- 40
- Assignees
- 37
- Inventors
- 113
- Latest grant
- 27 Jan 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 3 | 0 |
| 1993 | 0 | 0 |
| 1994 | 3 | 0 |
| 1995 | 2 | 0 |
| 1996 | 1 | 0 |
| 1997 | 2 | 0 |
| 1998 | 2 | 0 |
| 1999 | 1 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 2 | 2 |
| 2003 | 1 | 2 |
| 2004 | 0 | 1 |
| 2005 | 3 | 1 |
| 2006 | 2 | 0 |
| 2007 | 1 | 1 |
| 2008 | 0 | 2 |
| 2009 | 0 | 1 |
| 2010 | 2 | 1 |
| 2011 | 1 | 2 |
| 2012 | 2 | 3 |
| 2013 | 3 | 4 |
| 2014 | 4 | 3 |
| 2015 | 4 | 3 |
| 2016 | 1 | 3 |
| 2017 | 3 | 2 |
| 2018 | 2 | 2 |
| 2019 | 2 | 0 |
| 2020 | 0 | 0 |
| 2021 | 0 | 1 |
| 2022 | 0 | 0 |
| 2023 | 0 | 1 |
| 2024 | 0 | 1 |
| 2025 | 1 | 3 |
| 2026 | 1 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Interface/unicast for test content, firmware, and software delivery27 Jan 2026US 12,535,525 B2Altera Corporation
- System for scan mode exit and methods for scan mode exit14 Jan 2025US 12,196,804 B2NXP B. V.
- Circuit and method for diagnosing scan chain failures6 Aug 2019US 10,371,751 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Integrated defect detection and location systems and methods in semiconductor chip devices1 Jan 2019US 10,168,387 B2Infineon Technologies Austria AG
- Testing multi-core integrated circuit with parallel scan test data inputs and outputs21 Aug 2018US 10,054,637 B2NXP USA, Inc.
- Testing large-scale electronic systems constituted of many functional blocks1 Oct 2026US 2026/0299023 A1Krivya Semicon Private Limited
- Critical path sensitization in electronic systems30 Oct 2025US 2025/0334635 A1NXP B. V.
- Method and apparatus to detect computing system hardware defects using a portable storage device3 Apr 2025US 2025/0110175 A1Intel Corporation
- Apparatus for testing a device under test separating errors within a received pattern associated with different functional blocks of a device under test or associated with different blocks of one or more bits, method and computer program20 Mar 2025US 2025/0093414 A1Advantest Corporation
- System for scan mode exit and methods for scan mode exit21 Mar 2024US 2024/0094284 A1NXP B. V.
Most cited
By later US patents
- Transfer circuit for operation test of LSI systems109US 4,799,004 AKabushiki Kaisha Toshiba · 1989
- Hierarchical access of test access ports in embedded core integrated circuits94US 6,408,413 B1Texas Instruments Incorporated · 2002
- Programming programmable transistor devices using state machines84US 5,650,734 AAltera Corporation · 1997
- JTAG component description via nonvolatile memory70US 5,325,368 ANCR Corporation · 1994
- Flexible imbedded test system for VLSI circuits58US 4,931,722 AControl Data Corporation · 1990