Integrated defect detection and location systems and methods in semiconductor chip devices

The system of 1, wherein the plurality of registers comprises at least eight registers.

A device comprising:

• means for causing a signal to propagate along at least one signal line and through a plurality of registers spaced apart from one another in a semiconductor chip, the plurality of registers being coupled to one another by the at least one signal line, and the at least one signal line being arranged in a plurality of layers of the semiconductor chip;
• means for determining a presence, a location, and a layer of a physical defect in at least one of the plurality of layers of the semiconductor chip based on whether the signal propagates through the plurality of registers, wherein the means for determining a presence, a location, and a layer of the physical defect is configured to determine the location and the layer of the physical defect in at least one of the plurality of layers based on a failure of a signal to propagate from a first one of the plurality of registers along the signal line to a second adjacent one of the plurality of registers, wherein the location of the physical defect is proximate the first one or the second adjacent one of the plurality of registers.