H10W 80/314
Characterized by direct bonding of pads or other interconnections
Official title: {characterized by direct bonding of pads or other interconnections}
H10W80/314 (Characterized by direct bonding of pads or other interconnections) appears on 267 US grants and 443 published applications in this corpus.
Search patents in H10W- Granted patents
- 267
- Published applications
- 443
- Assignees
- 110
- Inventors
- 580
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1999 | 1 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 2 |
| 2004 | 2 | 2 |
| 2005 | 1 | 3 |
| 2006 | 3 | 3 |
| 2007 | 2 | 2 |
| 2008 | 1 | 2 |
| 2009 | 1 | 3 |
| 2010 | 2 | 2 |
| 2011 | 3 | 6 |
| 2012 | 4 | 9 |
| 2013 | 8 | 14 |
| 2014 | 9 | 17 |
| 2015 | 14 | 26 |
| 2016 | 17 | 11 |
| 2017 | 23 | 20 |
| 2018 | 22 | 26 |
| 2019 | 16 | 32 |
| 2020 | 31 | 26 |
| 2021 | 21 | 33 |
| 2022 | 25 | 29 |
| 2023 | 18 | 19 |
| 2024 | 17 | 22 |
| 2025 | 19 | 20 |
| 2026 | 7 | 114 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Memory device and method of assembling same22 Sep 2026US 12,745,632 B2SanDisk Technologies LLC
- Electronic device including stacked semiconductor chips and method of manufacturing the same15 Sep 2026US 12,740,486 B2Nanya Technology Corporation
- Via for semiconductor device connection9 Jun 2026US 12,653,020 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Stacked package structure including a chip disposed on a redistribution layer and a molding layer comprises a recess3 Mar 2026US 12,568,864 B2
- Package structure with a plurality of corner openings comprising different shapes and method of fabricating the same6 Jan 2026US 12,519,066 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Iii-v heterojunction bipolar transistor and its manufacturing method1 Oct 2026US 2026/0304809 A1Commissariat A L' Energie Atomique Et Aux Energies Alternatives
- Method for manufacturing semiconductor device, and semiconductor device1 Oct 2026US 2026/0305500 A1Resonac Corporation
- Method for manufacturing semiconductor device and semiconductor device1 Oct 2026US 2026/0305501 A1Resonac Corporation
- Direct bonding24 Sep 2026US 2026/0293756 A1Daicel Corporation
- Interconnect stack and a method for forming the same13 Aug 2026US 2026/0239928 A1JCET STATS ChipPAC Korea Limited
Most cited
By later US patents
- 3DIC stacking device and method of manufacture962US 9,443,783 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Method of room temperature covalent bonding315US 7,109,092 B2Ziptronix, Inc. · 2006
- Wafer bonding using a flexible bladder press for three dimensional (3D) vertical stack integration234US 7,037,804 B2Intel Corporation · 2006
- Wafer bonding using a flexible bladder press and thinned wafers for three-dimensional (3D) wafer-to-wafer vertical stack integration, and application thereof226US 6,975,016 B2Intel Corporation · 2005
- Method of room temperature covalent bonding215US 8,841,002 B2Ziptronix, Inc. · 2014