Interconnect stack and a method for forming the same

A method for forming an interconnect stack, comprising:

• providing a first semiconductor wafer having at its top side a first top dielectric layer and at its bottom side a first bottom dielectric layer, wherein the first semiconductor wafer comprises a plurality of first semiconductor units each having a set of first conductive interconnect structures extending through the first semiconductor wafer;
• providing a second semiconductor wafer having at its top side a second top dielectric layer and at its bottom side a second bottom dielectric layer, wherein the second semiconductor wafer comprises a plurality of second semiconductor units each having a set of second conductive interconnect structures extending through the second semiconductor wafer;
• aligning vertically the second semiconductor wafer with the first semiconductor wafer to stack them together;
• bonding each of the second semiconductor units with one of the first semiconductor units by using hybrid bonding such that the second top dielectric layer and the set of second conductive interconnect structures of the second semiconductor unit are aligned vertically and bonded with the first top dielectric layer and the set of first conductive interconnect structures of the first semiconductor unit, respectively;
• singulating the plurality of first semiconductor units of the first semiconductor wafer and the plurality of second semiconductor units of the second semiconductor wafer into a plurality of first semiconductor dice and a plurality of second semiconductor dice such that each of the first semiconductor dice is bonded with one of the second semiconductor dice to form a plurality of bilayer interconnect sub-stacks;
• testing each of the plurality of bilayer interconnect sub-stacks to sort out qualified bilayer interconnect sub-stacks from the plurality of bilayer interconnect sub-stacks;
• and
• bonding at least two of the qualified bilayer interconnect sub-stacks together to form the interconnect stack.

An interconnect stack, comprising:

• a first bilayer interconnect sub-stack and a second bilayer interconnect sub-stack bonded together, wherein each of the first and second bilayer interconnect sub-stacks comprises:
• a first semiconductor die having at its top side a first top dielectric layer and at its bottom side a first bottom dielectric layer, and a set of first conductive interconnect structures extending through the first semiconductor die;
• and
• a second semiconductor die having at its top side a second top dielectric layer and at its bottom side a second bottom dielectric layer, and a set of second conductive interconnect structures extending through the second semiconductor die;
• and
• wherein the first semiconductor die is bonded onto the second semiconductor die using hybrid bonding such that the first top dielectric layer and the set of first conductive interconnect structures of the first semiconductor die are aligned vertically and bonded with the second top dielectric layer and the set of second conductive interconnect structures of the second semiconductor die, respectively.