H10W 72/942
Relative to underlying supporting features
Official title: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
H10W72/942 (Relative to underlying supporting features) appears on 5,302 US grants and 6,487 published applications in this corpus.
Search patents in H10W- Granted patents
- 5,302
- Published applications
- 6,487
- Assignees
- 746
- Inventors
- 7,256
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 1 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 2 | 0 |
| 1995 | 1 | 0 |
| 1996 | 3 | 0 |
| 1997 | 8 | 0 |
| 1998 | 8 | 0 |
| 1999 | 6 | 0 |
| 2000 | 14 | 0 |
| 2001 | 37 | 27 |
| 2002 | 43 | 54 |
| 2003 | 66 | 118 |
| 2004 | 71 | 108 |
| 2005 | 85 | 148 |
| 2006 | 88 | 197 |
| 2007 | 95 | 161 |
| 2008 | 118 | 258 |
| 2009 | 126 | 164 |
| 2010 | 186 | 366 |
| 2011 | 207 | 229 |
| 2012 | 232 | 298 |
| 2013 | 269 | 286 |
| 2014 | 287 | 324 |
| 2015 | 308 | 366 |
| 2016 | 353 | 308 |
| 2017 | 345 | 312 |
| 2018 | 273 | 235 |
| 2019 | 255 | 318 |
| 2020 | 282 | 362 |
| 2021 | 291 | 396 |
| 2022 | 272 | 381 |
| 2023 | 304 | 304 |
| 2024 | 281 | 332 |
| 2025 | 251 | 291 |
| 2026 | 129 | 144 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Light emitting display device6 Oct 2026US 12,757,494 B2Samsung Display Co., Ltd.
- Chiplet-fine-interconnection-package structure and method of manufacturing the same6 Oct 2026US 12,757,767 B2Institute of Semiconductors, Guangdong Academy of Sciences
- Wafer-level hybrid bonded RF switch with redistribution layer6 Oct 2026US 12,757,792 B2Qorvo US, Inc.
- Multiple plated via arrays of different wire heights on a same substrate6 Oct 2026US RE51,062 E1Adeia Semiconductor Technologies LLC
- Display device29 Sep 2026US 12,751,160 B2Samsung Display Co., Ltd.
- Layer-by-layer formation of through-substrate via8 Oct 2026US 2026/0314369 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Methods of Forming Packages and Resulting Structures8 Oct 2026US 2026/0314493 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor package8 Oct 2026US 2026/0314497 A1Samsung Electronics Co., Ltd.
- Semiconductor device with advanced pad structure and method for forming same1 Oct 2026US 2026/0302085 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor package and method for manufacturing the same1 Oct 2026US 2026/0305288 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Structure and method for 3D IC package971US 8,993,380 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- 3DIC stacking device and method of manufacture962US 9,443,783 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Dummy structure for chip-on-wafer-on-substrate961US 9,425,126 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Packaging methods and structures using a die attach film854US 9,064,879 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices775US 7,157,787 B2Intel Corporation · 2007