H10W 72/924
Bond pads having multiple side-by-side cores
Official title: {Bond pads having multiple side-by-side cores}
H10W72/924 (Bond pads having multiple side-by-side cores) appears on 59 US grants and 77 published applications in this corpus.
Search patents in H10W- Granted patents
- 59
- Published applications
- 77
- Assignees
- 43
- Inventors
- 141
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2002 | 0 | 1 |
| 2003 | 0 | 0 |
| 2004 | 1 | 1 |
| 2005 | 0 | 0 |
| 2006 | 1 | 2 |
| 2007 | 0 | 0 |
| 2008 | 1 | 0 |
| 2009 | 0 | 0 |
| 2010 | 1 | 0 |
| 2011 | 0 | 1 |
| 2012 | 0 | 2 |
| 2013 | 2 | 1 |
| 2014 | 1 | 5 |
| 2015 | 5 | 4 |
| 2016 | 4 | 10 |
| 2017 | 5 | 6 |
| 2018 | 4 | 2 |
| 2019 | 4 | 4 |
| 2020 | 2 | 1 |
| 2021 | 3 | 4 |
| 2022 | 4 | 6 |
| 2023 | 6 | 11 |
| 2024 | 5 | 6 |
| 2025 | 7 | 2 |
| 2026 | 3 | 8 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Cryo-compatible quantum computing arrangement and method for producing a cryo-compatible quantum computing arrangement25 Aug 2026US 12,721,131 B2Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e. V.
- Semiconductor device and semiconductor module26 May 2026US 12,642,121 B2Fuji Electric Co., Ltd.
- Semiconductor package including pads17 Mar 2026US 12,582,009 B2Samsung Electronics Co., Ltd.
- Expansion controlled structure for direct bonding and method of forming same30 Dec 2025US 12,512,425 B2Adeia Semiconductor Bonding Technologies Inc.
- Semiconductor chip and semiconductor package including bonding layers having alignment marks2 Dec 2025US 12,489,071 B2Samsung Electronics Co., Ltd.
- Semiconductor structure and fabrication method thereof1 Oct 2026US 2026/0305439 A1United Microelectronics Corp.
- Method for manufacturing semiconductor device24 Sep 2026US 2026/0293757 A1Resonac Corporation
- Expansion controlled structure for direct bonding and method of forming same9 Jul 2026US 2026/0198363 A1Adeia Semiconductor Bonding Technologies Inc.
- Semiconductor package and method of manufacturing semiconductor package18 Jun 2026US 2026/0173969 A1Samsung Electronics Co., Ltd.
- Contact structure with flexible dielectric barrier30 Apr 2026US 2026/0120915 A1International Business Machines Corporation
Most cited
By later US patents
- Conductive barrier direct hybrid bonding254US 9,953,941 B2Invensas Bonding Technologies, Inc. · 2018
- Three dimensional integrated circuit integration using alignment via/dielectric bonding first and through via formation last180US 8,563,403 B1International Business Machines Corporation · 2013
- Method of accommodating in volume expansion during solder reflow36US 7,086,147 B2International Business Machines Corporation · 2006
- Solderable contact regions22US 8,975,175 B1SunPower Corporation · 2015
- Conductive barrier direct hybrid bonding21US 10,262,963 B2Invensas Bonding Technologies, Inc. · 2019