H10W 72/248
Top-view layouts
Official title: {Top-view layouts, e.g. mirror arrays}
H10W72/248 (Top-view layouts) appears on 2,589 US grants and 3,156 published applications in this corpus.
Search patents in H10W- Granted patents
- 2,589
- Published applications
- 3,156
- Assignees
- 532
- Inventors
- 4,499
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1989 | 1 | 0 |
| 1990 | 2 | 0 |
| 1991 | 0 | 0 |
| 1992 | 2 | 0 |
| 1993 | 1 | 0 |
| 1994 | 4 | 0 |
| 1995 | 3 | 0 |
| 1996 | 2 | 0 |
| 1997 | 2 | 0 |
| 1998 | 6 | 0 |
| 1999 | 10 | 0 |
| 2000 | 4 | 0 |
| 2001 | 8 | 6 |
| 2002 | 6 | 13 |
| 2003 | 14 | 13 |
| 2004 | 13 | 28 |
| 2005 | 15 | 34 |
| 2006 | 24 | 24 |
| 2007 | 13 | 35 |
| 2008 | 23 | 49 |
| 2009 | 25 | 36 |
| 2010 | 33 | 61 |
| 2011 | 45 | 116 |
| 2012 | 62 | 151 |
| 2013 | 128 | 216 |
| 2014 | 179 | 227 |
| 2015 | 201 | 235 |
| 2016 | 222 | 193 |
| 2017 | 216 | 215 |
| 2018 | 168 | 171 |
| 2019 | 175 | 198 |
| 2020 | 186 | 206 |
| 2021 | 129 | 209 |
| 2022 | 170 | 176 |
| 2023 | 168 | 168 |
| 2024 | 146 | 158 |
| 2025 | 113 | 141 |
| 2026 | 70 | 77 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Multiple plated via arrays of different wire heights on a same substrate6 Oct 2026US RE51,062 E1Adeia Semiconductor Technologies LLC
- Flip-chip field effect transistor layouts and structures29 Sep 2026US 12,751,077 B2Wolfspeed, Inc.
- Quantum bit chip having a stack of qubit wafers and spacer wafers, and a method for fabricating the quantum bit chip22 Sep 2026US 12,745,573 B2Imec Vzw
- Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices15 Sep 2026US 12,737,522 B2Taiwan Semiconductor Manufacturing Company.Ltd
- RF amplifiers with improved stability by source inductance adjustment15 Sep 2026US 12,740,427 B2MACOM Technology Solutions Holdings, Inc.
- High-density interconnect region with mixed bump widths8 Oct 2026US 2026/0314440 A1Intel Corporation
- Flip-chip package with pre-molded leadframe8 Oct 2026US 2026/0314454 A1Navitas Semiconductor Limited
- Semiconductor package including connection bump8 Oct 2026US 2026/0314471 A1Samsung Electronics Co., Ltd.
- Semiconductor device with advanced pad structure and method for forming same1 Oct 2026US 2026/0302085 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Methods of singulating embedded interconnect bridge die structures1 Oct 2026US 2026/0305409 A1Intel Corporation
Most cited
By later US patents
- Testing of semiconductor chips with microbumps1,870US 9,372,206 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- 3DIC stacking device and method of manufacture962US 9,443,783 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Multi-chip programmable logic device having configurable logic circuitry and configuration data storage on different dice399US 6,917,219 B2Xilinx, Inc. · 2005
- Wafer level stack structure for system-in-package and method thereof377US 7,215,033 B2Samsung Electronics Co., Ltd. · 2007
- Space-saving packaging of electronic circuits314US 7,071,546 B2Alfred E. Mann Foundation for Scientific Research · 2006