High-density interconnect region with mixed bump widths
AssigneeIntel Corporation
InventorsAndrew Paul Collins, Sujit Sharan, Jianyong Xie, Debendra Mallik
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AssigneeIntel Corporation
InventorsAndrew Paul Collins, Sujit Sharan, Jianyong Xie, Debendra Mallik
Estimating the term…
Microelectronic components and assemblies that have a high-density interconnect region with mixed bump widths may enable wafer sort-on-solder techniques with lower die area requirements and with improved power delivery to a high-density interconnect region. In one example, a microelectronic assembly includes two dies stacked over and coupled with one another and a plurality of conductive interconnects including a solder material (e.g., solder bumps/joints) between and coupled with the dies, where the plurality of conductive interconnects include first conductive interconnects with a first width and second conductive interconnects with a second with that is greater than the first width, and where the second conductive interconnects are coplanar and interleaved with the first conductive interconnects.
A microelectronic assembly, comprising:
A microelectronic assembly, comprising:
An integrated circuit (IC) die, comprising:
Dependencies are inferred from the claim text.