US 2026/0314471 A1Published application

Semiconductor package including connection bump

AssigneeSamsung Electronics Co., Ltd.

InventorsJunho Lee, Insik Han

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Abstract

A semiconductor package according to example embodiments of the present disclosure includes: a package substrate; a semiconductor chip including a first surface; and a plurality of connection bumps disposed below the first surface of the semiconductor chip, and the plurality of connection bumps include a first group of connection bumps and a second group of connection bumps, each of the first group of the connection bumps include a first connection pillar and a first connection solder, each of the second group of the connection bumps include a second connection pillar and a second connection solder, in a vertical direction, and in at least one of the second group of connection bumps, an upper end of the second connection solder disposed on a level lower than a level of an upper end of the first connection solder of each of the first group of the connection bumps.

Claims20

Dependent claims

A semiconductor package, comprising:

a package substrate including a plurality of upper connection pads;
a semiconductor chip disposed on the package substrate and including a first surface facing the package substrate, the first surface including a first region and a second region;
and
a plurality of connection bumps disposed below the first surface of the semiconductor chip and electrically connected to the plurality of upper connection pads,
wherein the plurality of connection bumps include a first group of connection bumps disposed within the first region of the first surface and a second group of connection bumps disposed within the second region of the first surface,
each of the first group of the connection bumps includes a first connection pillar and a first connection solder electrically connecting the first connection pillar to one of the plurality of upper connection pads,
each of the second group of the connection bumps includes a second connection pillar and a second connection solder electrically connecting the second connection pillar to one of the plurality of upper connection pads,
in a vertical direction, substantially perpendicular to the first surface, at least a portion of the second region has a greater separation distance from an upper surface of the package substrate than that of the first region, and
in at least one of the second group of connection bumps, an upper end of the second connection solder is disposed on a level lower than a level of an upper end of the first connection solder of each of the first group of the connection bumps.

6 more elements

A semiconductor package, comprising:

a package substrate including a first upper connection pad and a second upper connection pad;
a semiconductor chip disposed on the package substrate and electrically connected to the first upper connection pad and the second upper connection pad;
and
connection bumps including a first connection bump connected to the first upper connection pad and a second connection bump connected to the second upper connection pad, which are disposed between the package substrate and the semiconductor chip,
wherein the first connection bump includes:
a first connection pillar on a lower surface of the semiconductor chip;
and
a first connection solder covering a lower surface and a side surface of the first connection pillar and an upper surface of the first upper connection pad, and
the second connection bump includes:
a second connection pillar on the lower surface of the semiconductor chip;
and
a second connection solder covering a lower surface of the second connection pillar and an upper surface of the second upper connection pad, and
wherein a first gap between the lower surface of the first connection pillar and the upper surface of the first upper connection pad is less than a second gap between the lower surface of the second connection pillar and the upper surface of the second upper connection pad.

10 more elements

Dependencies are inferred from the claim text.