H10P 72/7418
Of passive members
Official title: {of passive members, e.g. a chip mounting substrate}
H10P72/7418 (Of passive members) appears on 612 US grants and 771 published applications in this corpus.
Search patents in H10P- Granted patents
- 612
- Published applications
- 771
- Assignees
- 178
- Inventors
- 1,077
- Latest grant
- 1 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 1 | 0 |
| 2001 | 0 | 0 |
| 2002 | 1 | 4 |
| 2003 | 4 | 10 |
| 2004 | 4 | 10 |
| 2005 | 10 | 13 |
| 2006 | 7 | 11 |
| 2007 | 6 | 9 |
| 2008 | 9 | 9 |
| 2009 | 7 | 19 |
| 2010 | 9 | 13 |
| 2011 | 16 | 20 |
| 2012 | 14 | 16 |
| 2013 | 10 | 16 |
| 2014 | 16 | 19 |
| 2015 | 24 | 25 |
| 2016 | 15 | 22 |
| 2017 | 37 | 26 |
| 2018 | 28 | 44 |
| 2019 | 39 | 55 |
| 2020 | 55 | 74 |
| 2021 | 44 | 67 |
| 2022 | 60 | 83 |
| 2023 | 60 | 72 |
| 2024 | 64 | 75 |
| 2025 | 52 | 49 |
| 2026 | 19 | 10 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Method of fabricating package structure1 Sep 2026US 12,727,522 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Thermally conductive semiconductor packaging structure and method for preparing same25 Aug 2026US 12,721,161 B2SJ Semiconductor(Jiangyin) Corporation
- Integrated circuit assemblies with rigid layers used for protection against mechanical thinning and for other purposes, and methods of fabricating such assemblies25 Aug 2026US RE51,016 E1Adeia Semiconductor Technologies LLC
- Fabricating method of semiconductor die with tapered sidewall in package11 Aug 2026US 12,708,050 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Curable resin film, film material for semiconductor device production, curable resin composition for semiconductor device production, and method for producing semiconductor device4 Aug 2026US 12,702,047 B2
- Methods for making semiconductor devices3 Sep 2026US 2026/0262475 A1STATS ChipPAC Pte. Ltd.
- Multi-chip module and method for manufacturing thereof27 Aug 2026US 2026/0255993 A1Inpack Technologies - Limited Partnership
- Substrate processing and packaging20 Aug 2026US 2026/0247989 A1Texas Instruments Incorporated
- Side of a die that is coplanar with a side of a molding30 Jul 2026US 2026/0223744 A1Intel Corporation
- Integrated circuit package and method9 Jul 2026US 2026/0198375 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Multi-stack package-on-package structures744US 9,735,131 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Multi-dice chip scale semiconductor components and wafer level methods of fabrication456US 6,841,883 B1Micron Technology, Inc. · 2005
- Semiconductor component having plate, stacked dice and conductive vias277US 7,498,675 B2Micron Technology, Inc. · 2009
- Method for fabricating encapsulated semiconductor components235US 6,908,784 B1Micron Technology, Inc. · 2005
- Method of separating two layers of material from one another and electronic components produced using this process225US 6,559,075 B1Siemens Aktiengesellschaft · 2003