Multi-dice chip scale semiconductor components and wafer level methods of fabrication

A semiconductor component comprising:

• a base die comprising a substrate having a back side, and a plurality of conductive vias in the substrate;
• a secondary die having a circuit side bonded to the back side and a plurality of contacts bonded to the conductive vias;
• a plurality of terminal contacts on the base die in electrical communication with the conductive vias;
• and
• an encapsulant on the back side at least partially encapsulating the secondary die.

A semiconductor component comprising:

• a base die comprising a substrate having a back side, and a plurality of conductive vias in the substrate;
• a secondary die having a circuit side bonded to the back side and a plurality of contacts bonded to the conductive vias;
• a plurality of terminal contacts on the base die in electrical communication with the conductive vias;
• and
• a polymer layer on the base die configured as a protective member, a rigidifying member and a stencil for forming the terminal contacts.

A semiconductor component comprising:

• a base die comprising a substrate having a back side, and a plurality of conductive vias in the substrate;
• a secondary die having a circuit side bonded to the back side and a plurality of contacts bonded to the conductive vias;
• and
• a plurality of terminal contacts on the base die in electrical communication with the conductive vias;
• the base die and the secondary die comprising thinned dice.

A semiconductor component comprising:

• a thinned base die comprising a circuit side, a back side, a plurality of conductive vias and a plurality of contacts on the back side in electrical communication with the conductive vias;
• a thinned secondary die stacked on the base die and bonded to the contacts;
• and
• a plurality of terminal contacts on the circuit side in electrical communication with the conductive vias.

A semiconductor component comprising:

• a base die comprising a thinned semiconductor substrate and a plurality of conductors on the substrate;
• an internal signal transmission system comprising a plurality of conductive vias in the substrate in electrical communication with the conductors, and a plurality of contacts on the conductive vias;
• a secondary die bonded to the contacts;
• and
• a plurality of terminal contacts on the conductors.

A semiconductor component comprising:

• a base die comprising a thinned semiconductor substrate having a peripheral outline, a circuit side, a back side, and a plurality of conductive vias in the substrate;
• a thinned secondary die bonded to the back side and comprising a plurality of integrated circuits in electrical communication with the conductive vias;
• an encapsulant on the back side having the peripheral outline and at least partially encapsulating the secondary die;
• a polymer layer on the circuit side having the peripheral outline and configured as a protective and rigidifying member for the component;
• and
• a plurality of terminal contacts on the circuit side in electrical communication with the conductive vias.

A semiconductor component comprising:

• a base die comprising a thinned semiconductor substrate having a peripheral outline, a circuit side, a back side, and a plurality of conductive vias in the substrate;
• a thinned secondary die bonded to the back side and comprising a plurality of integrated circuits in electrical communication with the conductive vias;
• an encapsulant on the back side having the peripheral outline and at least partially encapsulating the secondary die;
• a polymer layer on the circuit side having the peripheral outline and configured as a protective and rigidifying member for the component;
• a plurality of terminal contacts on the circuit side in electrical communication with the conductive vias;
• and
• a second secondary die bonded to the thinned secondary die in electrical communication with the conductive vias.

A semiconductor component comprising:

• a first base die comprising a plurality of first conductive vias;
• a second base die stacked and bonded to the first base die comprising a plurality of second conductive vias in electrical communication with the first conductive vias;
• a secondary die stacked and bonded to the second base die comprising a plurality of bumped contacts bonded to the second conductive vias;
• and
• a plurality of terminal contacts on the first base die in electrical communication with the first conductive vias,
• with either the first base die, the second base die or the secondary die comprising a thinned die.

A semiconductor component comprising:

• a base die comprising a semiconductor substrate having a circuit side and a back side, a plurality of die contacts on the circuit side, a plurality of conductive vias in the substrate in electrical communication with the die contacts, a plurality of redistribution conductors on the circuit side in electrical communication with the conductive vias, and a plurality of terminal contacts on the circuit side in electrical communication with the conductors;
• a secondary die bonded to the back side;
• an underfill layer bonding the secondary die to the base die;
• and
• a plurality of bumped contacts bonded to the conductive vias and to the secondary die.

A semiconductor component comprising:

• a base die comprising a circuit side, a back side, a plurality of conductive vias and a plurality of contacts on the back side in electrical communication with the conductive vias;
• a first secondary die stacked on the base die and bonded to the contacts, the first secondary die comprising a plurality of secondary conductive vias and a plurality of secondary contacts in electrical communication with the secondary conductive vias;
• a second secondary die stacked on the first secondary die and bonded to the secondary contacts;
• a plurality of terminal contacts on the circuit side in electrical communication with the conductive vias;
• and
• a polymer layer on the circuit side configured as a stencil for the terminal contacts.

A semiconductor component comprising:

• a base die comprising a circuit side, a back side, a plurality of conductive vias and a plurality of contacts on the back side in electrical communication with the conductive vias;
• a first secondary die stacked on the base die and bonded to the contacts, the first secondary die comprising a plurality of secondary conductive vias and a plurality of secondary contacts in electrical communication with the secondary conductive vias;
• a second secondary die stacked on the first secondary die and bonded to the secondary contacts;
• a plurality of terminal contacts on the circuit side in electrical communication with the conductive vias;
• and
• an encapsulant on the back side at least partially encapsulating the first secondary die and the second secondary die.

A semiconductor component comprising:

• a base die comprising a circuit side, a back side, a plurality of conductive vias and a plurality of contacts on the back side in electrical communication with the conductive vias;
• a first secondary die stacked on the base die and bonded to the contacts, the first secondary die comprising a plurality of secondary conductive vias and a plurality of secondary contacts in electrical communication with the secondary conductive vias;
• a second secondary die stacked on the first secondary die and bonded to the secondary contacts;
• a plurality of terminal contacts on the circuit side in electrical communication with the conductive vias;
• and
• a polymer layer on the circuit side configured as a rigidifying member, a protective member, and a stencil for forming the terminal contacts.

A semiconductor component comprising:

• a base die comprising a circuit side, a back side, a plurality of conductive vias and a plurality of contacts on the back side in electrical communication with the conductive vias;
• a first secondary die stacked on the base die and bonded to the contacts, the first secondary die comprising a plurality of secondary conductive vias and a plurality of secondary contacts in electrical communication with the secondary conductive vias;
• a second secondary die stacked on the first secondary die and bonded to the secondary contacts;
• and
• a plurality of terminal contacts on the circuit side in electrical communication with the conductive vias;
• the base die, the first secondary die and the second secondary die comprising thinned dice.

A system comprising:

• a substrate;
• a semiconductor component on the substrate comprising a base die comprising a substrate having a back side, and a plurality of conductive vias in the substrate, a secondary die having a circuit side bonded to the back side and a plurality of contacts bonded to the conductive vias, and a plurality of terminal contacts on the base die in electrical communication with the conductive vias;
• and
• a cap plate bonded to the secondary die configured to short selected contacts on the base die to selected contacts on the secondary die.

A system comprising:

• a substrate;
• and
• a semiconductor component on the substrate comprising a base die comprising a substrate having a back side, and a plurality of conductive vias in the substrate, a secondary die having a circuit side bonded to the back side and a plurality of contacts bonded to the conductive vias, and a plurality of terminal contacts on the base die in electrical communication with the conductive vias;
• and
• a cap plate bonded to the secondary die and at least one electrical element on the cap plate in electrical communication with the secondary die.

A system comprising:

• a substrate;
• a semiconductor component on the substrate comprising a base die comprising a substrate having a back side, and a plurality of conductive vias in the substrate, a secondary die having a circuit side bonded to the back side and a plurality of contacts bonded to the conductive vias, and a plurality of terminal contacts on the base die in electrical communication with the conductive vias;
• and
• an encapsulant on the back side at least partially encapsulating the secondary die.

A system comprising:

• a substrate;
• a semiconductor component on the substrate comprising a base die comprising a substrate having a back side, and a plurality of conductive vias in the substrate, a secondary die having a circuit side bonded to the back side and a plurality of contacts bonded to the conductive vias, and a plurality of terminal contacts on the base die in electrical communication with the conductive vias;
• and
• a polymer layer on the base die configured as a protective member, a rigidifying member and a stencil for forming the terminal contacts.

A system comprising:

• a substrate comprising a plurality of electrodes;
• and
• a semiconductor component on the substrate comprising:
• a thinned base die comprising a circuit side, a back side, a plurality of conductive vias and a plurality of contacts on the back side in electrical communication with the conductive vias;
• a thinned secondary die stacked on the base die and bonded to the contacts;
• and
• a plurality of terminal contacts on the circuit side in electrical communication with the conductive vias and bonded to the electrodes.

A system comprising:

• a substrate comprising a plurality of electrodes;
• a semiconductor component on the substrate comprising:
• a base die comprising a thinned substrate having a peripheral outline and a plurality of conductive vias in the substrate;
• a thinned secondary die comprising a plurality of bumped contacts bonded to the conductive vias and electrically connecting the base die and the secondary die;
• an encapsulant on the base die having the peripheral outline and at least partially encapsulating the secondary die;
• a rigidifying polymer layer on the base die having the peripheral outline;
• and
• a plurality of terminal contacts on the base die proximate to the polymer layer in electrical communication with the conductive vias and bonded to the electrodes.