H10D 30/792
Comprising applied insulating layers
Official title: {comprising applied insulating layers, e.g. stress liners}
H10D30/792 (Comprising applied insulating layers) appears on 1,878 US grants and 2,349 published applications in this corpus.
Search patents in H10D- Granted patents
- 1,878
- Published applications
- 2,349
- Assignees
- 211
- Inventors
- 2,537
- Latest grant
- 11 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1995 | 1 | 0 |
| 1996 | 0 | 0 |
| 1997 | 1 | 0 |
| 1998 | 1 | 0 |
| 1999 | 1 | 0 |
| 2000 | 1 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 2 |
| 2003 | 2 | 4 |
| 2004 | 2 | 18 |
| 2005 | 10 | 67 |
| 2006 | 32 | 135 |
| 2007 | 69 | 203 |
| 2008 | 100 | 297 |
| 2009 | 136 | 200 |
| 2010 | 168 | 124 |
| 2011 | 160 | 122 |
| 2012 | 131 | 156 |
| 2013 | 126 | 112 |
| 2014 | 130 | 90 |
| 2015 | 119 | 107 |
| 2016 | 95 | 90 |
| 2017 | 77 | 62 |
| 2018 | 70 | 49 |
| 2019 | 73 | 75 |
| 2020 | 69 | 80 |
| 2021 | 69 | 91 |
| 2022 | 65 | 72 |
| 2023 | 55 | 61 |
| 2024 | 48 | 57 |
| 2025 | 53 | 51 |
| 2026 | 14 | 24 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Heterogeneous metal line compositions for advanced integrated circuit structure fabrication11 Aug 2026US 12,707,697 B2Intel Corporation
- Trench power device with enhanced charge carrier mobility11 Aug 2026US 12,707,701 B2Infineon Technologies AG
- Multilayer encapsulation for humidity robustness and highly accelerated stress tests and related fabrication methods11 Aug 2026US 12,708,027 B2Wolfspeed, Inc.
- Layer structures including configuration increasing operation characteristics, methods of manufacturing the same, electronic devices including layer structures, and electronic apparatuses including electronic devices14 Jul 2026US 12,684,823 B2Samsung Electronics Co., Ltd.
- Semiconductor structure and fabricating method of the same23 Jun 2026US 12,666,681 B2United Microelectronics Corp.
- Layer structures including configuration increasing operation characteristics, methods of manufacturing the same, electronic devices including layer structures, and electronic apparatuses including electronic devices1 Oct 2026US 2026/0304848 A1Samsung Electronics Co., Ltd.
- Strain engineering using fin isolation structures1 Oct 2026US 2026/0304849 A1Intel Corporation
- Contact strap extending to common source/drain region of adjacent gate structures13 Aug 2026US 2026/0239711 A1GLOBALFOUNDRIES U. S. Inc.
- Semiconductor apparatus and electronic device6 Aug 2026US 2026/0231478 A1Sony Semiconductor Solutions Corporation
- Semiconductor device and method of manufacturing the same16 Jul 2026US 2026/0206312 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Method for forming strained silicon nitride films and a device containing such films532US 7,651,961 B2Tokyo Electron Limited · 2010
- Structure and method for fabricating self-aligned metal contacts527US 7,981,751 B2International Business Machines Corporation · 2011
- Method for reducing resist poisoning during patterning of silicon nitride layers in a semiconductor device511US 7,550,396 B2Advanced Micro Devices, Inc. · 2009
- PMOS transistor with compressive dielectric capping layer500US 7,214,630 B1Novellus Systems, Inc. · 2007
- Method to increase silicon nitride tensile stress using nitrogen plasma in-situ treatment and ex-situ UV cure481US 8,138,104 B2APPLIED Materials.Inc. · 2012