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US 7,550,396 B2Granted
Method for reducing resist poisoning during patterning of silicon nitride layers in a semiconductor device
AssigneeAdvanced Micro Devices, Inc.
InventorsKai Frohberg, Volker Grimm, Sven Mueller, Matthias Lehr, Ralf Richter, Jochen Klais, Martin Mazur, Heike Salz, Joerg Hohage, Matthias Schaller
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Abstract
By performing a plasma treatment for efficiently sealing the surface of a stressed dielectric layer containing silicon nitride, an enhanced performance during the patterning of contact openings may be achieved, since nitrogen-induced resist poisoning may be significantly reduced during the selective patterning of stressed layers of different types of intrinsic stress.
Claims22
A method, comprising:
- forming a first stress-inducing layer above a first transistor and a second transistor, wherein forming said first stress-inducing layer comprises depositing a stressed material layer and forming an etch indicator layer thereon;
- performing a plasma treatment on said first stress-inducing layer for densifying a surface thereof;
- forming a first resist mask above said first stress-inducing layer having said densified surface to cover said first transistor, said first resist mask exposing a portion of said first stress-inducing layer;
- and
- removing said exposed portion of said first stress-inducing layer from above said second transistor.
2 more elements
A method, comprising:
- forming a silicon nitride containing material layer above a device area of a semiconductor device;
- forming an etch indicator layer on said silicon nitride containing material layer;
- performing a plasma treatment in an oxidizing ambient to modify a surface of said silicon nitride containing material layer;
- forming a resist mask above said plasma treated silicon nitride containing material layer;
- and
- performing an etch process on the basis of said resist mask.
3 more elements
A method, comprising:
- forming a first stress-inducing layer having a first type of intrinsic stress above a first device region and a second device region, wherein forming said first stress-inducing layer comprises forming an etch indicator layer;
- forming a first resist mask above said first stress-inducing layer, said first resist mask exposing said second device region and covering said first device region;
- selectively removing said first stress-inducing layer from above said second device region;
- forming a second stress-inducing layer having a second type of intrinsic stress above said first and second device regions;
- forming a second resist mask above said second stress-inducing layer, said second resist mask exposing said first device region and covering said second device region;
- and
- performing at least one plasma treatment at least prior to forming said second resist mask.
4 more elements
Dependencies are inferred from the claim text.