US 7,214,630 B1 · PMOS transistor with compressive dielectric capping layer

Abstract

A salicide layer is deposited on the source/drain regions of a PMOS transistor. A dielectric capping layer having residual compressive stress is formed on the salicide layer by depositing a plurality of PECVD dielectric sublayers and plasma-treating each sublayer. Compressive stress from the dielectric capping layer is uniaxially transferred to the PMOS channel through the source-drain regions to create compressive strain in the PMOS channel. To form a compressive dielectric layer, a deposition reactant mixture containing A1 atoms and A2 atoms is provided in a vacuum chamber. Element A2 is more electronegative than element A1, and A1 atoms have a positive oxidation state and A2 atoms have a negative oxidation state when A1 atoms are bonded with A2 atoms. A deposition plasma is generated by applying HF and LF radio-frequency power to the deposition reactant mixture, and a sublayer of compressive dielectric material is deposited. A post-treatment plasma is generated by applying HF and LF radio-frequency power to a post-treatment gas that does not contain at least one of A1 atoms and A2 atoms. Compressive stress in the dielectric sublayer is increased by treating the sublayer in the post-treatment plasma. Processes of depositing a dielectric sublayer and post-treating the sublayer in plasma are repeated until a desired thickness is achieved. The resulting dielectric layer has residual compressive stress.

Claims34

Dependent claims

A method of fabricating a dielectric layer having compressive stress on a semiconductor substrate, comprising processes of:

(a) providing in a vacuum chamber a deposition reactant mixture comprising A1 atoms of a chemical element A1 and A2 atoms of a chemical element A2, wherein said element A2 is more electronegative than said element A1, and wherein said A1 atoms have a positive oxidation state and said A2 atoms have a negative oxidation state when A1 atoms are bonded with A2 atoms;
(b) applying high-frequency (HF) and low-frequency (LF) power to said deposition reactant mixture to generate a deposition plasma containing excited A1-species and excited A2-species;
(c) depositing a dielectric sublayer on said substrate using said deposition plasma;
(d) providing a post-treatment gas containing peening species to a vacuum chamber, said post-treatment gas being substantially free of at least one type of atoms selected from the group consisting of A1-type atoms and A2-type atoms;
(e) applying HF and LF power to said post-treatment gas to generate a post-treatment plasma, said post-treatment plasma comprising excited peening species, and said post-treatment plasma being substantially free of at least one type of atoms selected from the group consisting of A1-type atoms and A2-type atoms;
(f) post-treating said dielectric sublayer in said post-treatment plasma;
and
(g) repeating said processes (c) and (f) of depositing a dielectric sublayer and post-treating said dielectric sublayer until a desired thickness of a dielectric material is achieved.

5 more elements

A method of fabricating a dielectric layer having compressive stress on a semiconductor substrate, comprising processes of:

(a) providing in a vacuum chamber a deposition reactant mixture comprising A1 atoms of a chemical element A1 and A2 atoms of a chemical element A2, wherein said element A2 is more electronegative than said element A1, and wherein said A1 atoms have a positive oxidation state and said A2 atoms have a negative oxidation state when A1 atoms are bonded with A2 atoms;
(b) applying high-frequency (HF) and low-frequency (LF) power to said deposition reactant mixture to generate a deposition plasma containing excited A1-species and excited A2-species;
(c) depositing a dielectric layer on said substrate using said deposition plasma;
(d) providing a post-treatment gas containing peening species to a vacuum chamber, said post-treatment gas being substantially free of at least one type of atoms selected from the group consisting of A1-type atoms and A2-type atoms;
(e) applying HF and LF power to said post-treatment gas to generate a post-treatment plasma, said post-treatment plasma comprising excited peening species, and said post-treatment plasma being substantially free of at least one type of atoms selected from the group consisting of A1-type atoms and A2-type atoms;
and
(f) post-treating said dielectric layer in said post-treatment plasma.

4 more elements

Dependencies are inferred from the claim text.

PMOS transistor with compressive dielectric capping layer

Life of this patent

PMOS transistor with compressive dielectric capping layer

Life of this patent

Abstract

Claims34