H10D 30/0215
Using self-aligned selective metal deposition simultaneously on gate electrodes and the source
Official title: {using self-aligned selective metal deposition simultaneously on gate electrodes and the source regions or drain regions}
H10D30/0215 (Using self-aligned selective metal deposition simultaneously on gate electrodes and the source) appears on 197 US grants and 193 published applications in this corpus.
Search patents in H10D- Granted patents
- 197
- Published applications
- 193
- Assignees
- 58
- Inventors
- 380
- Latest grant
- 19 May 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1985 | 2 | 0 |
| 1986 | 1 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 5 | 0 |
| 1999 | 3 | 0 |
| 2000 | 4 | 0 |
| 2001 | 3 | 0 |
| 2002 | 2 | 6 |
| 2003 | 2 | 1 |
| 2004 | 3 | 2 |
| 2005 | 3 | 2 |
| 2006 | 1 | 5 |
| 2007 | 0 | 2 |
| 2008 | 2 | 2 |
| 2009 | 0 | 0 |
| 2010 | 3 | 1 |
| 2011 | 1 | 2 |
| 2012 | 1 | 5 |
| 2013 | 8 | 9 |
| 2014 | 9 | 10 |
| 2015 | 9 | 13 |
| 2016 | 15 | 9 |
| 2017 | 17 | 33 |
| 2018 | 22 | 8 |
| 2019 | 14 | 9 |
| 2020 | 7 | 12 |
| 2021 | 15 | 24 |
| 2022 | 16 | 13 |
| 2023 | 9 | 6 |
| 2024 | 8 | 10 |
| 2025 | 6 | 5 |
| 2026 | 5 | 4 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Vertical transistor with self-align backside contact19 May 2026US 12,635,216 B2International Business Machines Corporation
- Semiconductor device with protective gate structure and methods of fabrication thereof31 Mar 2026US 12,593,463 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Gate-top dielectric structure for self-aligned contact24 Mar 2026US 12,588,229 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor devices and methods of fabrication thereof24 Mar 2026US 12,588,244 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Bird's beak profile of field oxide region3 Mar 2026US 12,568,647 B2Texas Instruments Incorporated
- Semiconductor device with protective gate structure and methods of fabrication thereof6 Aug 2026US 2026/0231455 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Fin to fin trench contact through a metal gate cut30 Jul 2026US 2026/0223385 A1Intel Corporation
- Semiconductor devices and methods of fabrication thereof30 Jul 2026US 2026/0223400 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Bird's beak profile of field oxide region18 Jun 2026US 2026/0173442 A1Texas Instruments Incorporated
- Gate-top dielectric structure for self-aligned contact20 Nov 2025US 2025/0359107 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Device structure and method for reducing silicide encroachment232US 6,765,273 B1Intel Corporation · 2004
- Method for the manufacture of integrated MOS-field effect transistor circuits silicon gate technology having diffusion zones coated with silicide as low-impedance printed conductors203US 4,510,670 ASiemens Aktiengesellschaft · 1985
- Structure and method for manufacturing improved FETs having T-shaped gates79US 5,783,479 ANational Science Council · 1998
- Method for selective deposition of refractory metal and device formed thereby66US 5,807,788 AInternational Business Machines Corporation · 1998
- Oxide trench structure for polysilicon gates and interconnects58US 4,503,601 ANCR Corporation · 1985