Fin to fin trench contact through a metal gate cut
AssigneeIntel Corporation
InventorsGuillaume BOUCHE, Shashi VYAS, Andy Chih-Hung WEI, Leonard P. GULER
Life of this patent
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Abstract
Embodiments described herein may be related to apparatuses, processes, and techniques related to manufacturing a gate structure that includes adjacent gates that are coupled with the first fin and a second fin, with a metal gate cut across the adjacent gates and a trench connector between the adjacent gates that electrically couples the first fin and the second fin. Other embodiments may be described and/or claimed.
Claims20
An integrated circuit structure, comprising:
- a first nanoribbon along a first direction in a top-down view;
- a second nanoribbon along the first direction in the top-down view;
- a first gate over the first nanoribbon and the second nanoribbon, the first gate along a second direction orthogonal to the first direction in the top-down view;
- a second gate over the first nanoribbon, the second gate along the second direction in the top-down view;
- a first cut in the first gate, the first cut including a material comprising silicon and nitrogen therein;
- a second cut in the second gate, the second cut laterally spaced apart from the first cut along the first direction in the top-down view, and the second cut including a material comprising silicon and nitrogen therein;
- and
- a trench connector along the second direction in the top-down view, the trench connector over the first nanoribbon and the second nanoribbon, and laterally between the first cut and the second cut.
An integrated circuit structure, comprising:
- a first nanoribbon along a first direction in a top-down view;
- a second nanoribbon along the first direction in the top-down view, the second nanoribbon laterally spaced apart from the first nanoribbon along a second direction orthogonal to the first direction in the top-down view;
- a first gate over the first nanoribbon and the second nanoribbon along the second direction in the top-down view;
- a second gate over the first nanoribbon, the second gate along the second direction in the top-down view, the second gate laterally spaced apart from the first gate along the first direction in the top-down view;
- a first dielectric structure extending through the first gate, the first dielectric structure including a material comprising silicon and nitrogen therein;
- a second dielectric structure extending through the second gate, the second dielectric structure laterally spaced apart from the first dielectric structure along the first direction in the top-down view, and the second dielectric structure including a material comprising silicon and nitrogen therein;
- and
- a trench connector along the second direction in the top-down view, the trench connector over the first nanoribbon and the second nanoribbon, and laterally between the first dielectric structure and the second dielectric structure.
A method of fabricating an integrated circuit structure, the method comprising:
- forming a first nanoribbon along a first direction in a top-down view;
- forming a second nanoribbon along the first direction in the top-down view;
- forming a first gate over the first nanoribbon and the second nanoribbon, the first gate along a second direction orthogonal to the first direction in the top-down view;
- forming a second gate over the first nanoribbon, the second gate along the second direction in the top-down view;
- forming a first cut in the first gate, the first cut including a material comprising silicon and nitrogen therein;
- forming a second cut in the second gate, the second cut laterally spaced apart from the first cut along the first direction in the top-down view, and the second cut including a material comprising silicon and nitrogen therein;
- and
- forming a trench connector along the second direction in the top-down view, the trench connector over the first nanoribbon and the second nanoribbon, and laterally between the first cut and the second cut.
Dependencies are inferred from the claim text.