H05K 2201/0949
Pad close to a hole, not surrounding the hole
H05K2201/0949 (Pad close to a hole, not surrounding the hole) appears on 198 US grants and 193 published applications in this corpus.
Search patents in H05K- Granted patents
- 198
- Published applications
- 193
- Assignees
- 140
- Inventors
- 405
- Latest grant
- 31 Mar 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1984 | 2 | 0 |
| 1985 | 0 | 0 |
| 1986 | 1 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 3 | 0 |
| 1995 | 4 | 0 |
| 1996 | 2 | 0 |
| 1997 | 1 | 0 |
| 1998 | 1 | 0 |
| 1999 | 3 | 0 |
| 2000 | 7 | 0 |
| 2001 | 4 | 2 |
| 2002 | 11 | 9 |
| 2003 | 9 | 12 |
| 2004 | 11 | 11 |
| 2005 | 5 | 14 |
| 2006 | 12 | 15 |
| 2007 | 9 | 8 |
| 2008 | 6 | 12 |
| 2009 | 10 | 16 |
| 2010 | 7 | 13 |
| 2011 | 11 | 11 |
| 2012 | 11 | 8 |
| 2013 | 10 | 12 |
| 2014 | 7 | 6 |
| 2015 | 8 | 8 |
| 2016 | 8 | 3 |
| 2017 | 8 | 4 |
| 2018 | 3 | 3 |
| 2019 | 2 | 4 |
| 2020 | 7 | 2 |
| 2021 | 3 | 3 |
| 2022 | 1 | 5 |
| 2023 | 2 | 2 |
| 2024 | 3 | 4 |
| 2025 | 3 | 2 |
| 2026 | 2 | 4 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Printed circuit board having lead pads that accommodate offset electronic component leads31 Mar 2026US 12,593,406 B2SanDisk Technologies LLC
- Electronic device24 Mar 2026US 12,586,611 B2Kabushiki Kaisha Toshiba
- Inlay with exposed porous layer, component carrier and manufacturing methods25 Nov 2025US 12,484,154 B2AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
- Board-level pad pattern for multi-row QFN packages20 May 2025US 12,309,921 B2Mediatek Inc.
- Apparatus and methods for nanoplasma switches1 Apr 2025US 12,267,940 B2Analog Devices International Unlimited Company
- Solder area formed to capture two wires6 Aug 2026US 2026/0229801 A1Kollmorgen Corporation
- Circuit board and circuit board assembly2 Jul 2026US 2026/0190226 A1Zte Corporation
- Inlay With Exposed Porous Layer, Component Carrier, and Manufacturing Method19 Mar 2026US 2026/0082487 A1AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
- Devices Including Substrate Structure With Laterally Offset Ground Vias And Metal Balls12 Mar 2026US 2026/0075712 A1Mediatek Inc.
- Method for electrically connecting electronic components of a battery system and battery system21 Aug 2025US 2025/0266629 A1Samsung SDI.Co., Ltd.
Most cited
By later US patents
- Interconnection method and structure for organic circuit boards248US 5,435,057 AInternational Business Machines Corporation · 1995
- Long range optical reader243US 7,055,747 B2Hand Held Products, Inc. · 2006
- Optical reader having a plurality of imaging modules219US 7,219,843 B2Hand Held Products, Inc. · 2007
- Multi-chip integrated circuit module178US 5,432,677 ATexas Instruments Incorporated · 1995
- Process for mounting electronic device and semiconductor device167US 6,208,525 B1Hitachi Hokkai Semiconductor, Ltd. · 2001