US 5,432,677 A · Multi-chip integrated circuit module

Abstract

A multi-chip integrated circuit module includes a supporting layer of laminate material over which a high-density interconnect structure is formed. The laminate layer includes a first upper laminate layer (10) having a hole (14) disposed therein for receiving an integrated circuit chip die (56). A lower core laminate layer (16) having a conductive layer (18) and conductive layer (20) disposed on opposite sides thereof is laminated to the lower surface of the layer (10). Plated-through holes (36), (38) and (40) are formed through the two layers (10) and (16) to connect the conductive layer (20) with a conductive layer (12) on the upper surface of the layer (10). A high-density interconnect layer includes two laminate layers (126) and (138), each having vias formed therethrough and via interconnect structures disposed on the surfaces thereof. The via interconnect structures in the layer (126) allow for connections from the die (56) to the conductive layer (12). The via interconnect structures formed in the layer (138) allow interconnection from the upper surface of layer (138) to via interconnects formed in the layer (126). An I/O connector is interfaced with select ones of the plated-through holes with pins (162) and (164). This allows an interface from the module to an operating system through pins (166).

Claims21

Dependent claims

A multi-chip integrated circuit package, comprising:

(a) a substrate having upper and lower surfaces, fabricated from a polymer material and having a lower electrically conductive layer disposed on the lower surface thereof;
(b) a plurality of cavities disposed in the upper surface of said substrate for receiving integrated circuit chips;
(c) a plurality of integrated circuit chips having bonding pads associated therewith, each of said integrated circuit chips disposed within an associated one of said cavities such that the upper surfaces thereof are substantially co-planar with the upper surface of said substrate;
(d) at least one electrically conductive pad disposed on the upper surface of said substrate;
(e) a substrate interconnection disposed between said electrically conductive pad and said lower conductive layer electrically connecting said electrically conductive pad to said lower conductive layer;
(f) an electrically insulating polymer film disposed over the upper surface of said substrate and said integrated circuit chips and having a plurality of via openings therein aligned with at least some of said bonding pads and with said conductive pad;
and
(g) an electrically conductive pattern disposed on the upper surface of said polymer film extending through at least some of said vias to provide electrical connections between at least some of said bonding pads and said electrically conductive pad.

5 more elements

A multi-chip integrated circuit package, comprising:

(a) a first substrate layer having upper and lower surfaces and having a first thermal resistance;
(b) a plurality of cavities disposed in the upper surface of said first substrate layer for receiving integrated circuit chips, predetermined ones of said cavities having integrated circuit chips therein with bonding pads thereon;
(c) a second substrate layer having upper and lower surfaces with a first electrically conductive layer disposed on the upper surface thereof and a second electrically conductive layer disposed on the lower surface thereof, said first electrically conductive layer having a thermal resistance substantially lower than said first thermal resistance, the upper surface of said first conductive layer attached to the lower surface of said first substrate layer;
(d) a polymer film disposed over the upper surface of said first substrate layer and said integrated circuit chips and having a plurality of via openings therein aligned with at least some of said bonding pads;
and
(e) a pattern of interconnection conductors disposed on the upper surface of said polymer film extending through at least some of said openings and providing electrical connections to at least some of said bonding pads.

3 more elements

A multi-chip module, comprising:

(a) a first substrate layer of polymer material having upper and lower surfaces;
(b) a second substrate layer of polymer material having upper and lower surfaces, said second substrate layer having a first thermally conductive layer of thermally conductive material disposed on the upper surface thereof and a first conductive layer disposed on the lower surface thereof, the lower surface of said first substrate layer laminated to the upper surface of said thermally conductive layer;
(c) a plurality of cavities formed in the upper surface of said first substrate layer for receiving integrated circuit chips;
(d) a plurality of integrated circuits having bonding pads associated therewith, and each of said integrated circuit chips disposed within an associated one of said cavities such that the upper surfaces thereof are substantially coplanar with the upper surface of said first substrate layer;
(e) a plurality of conductive pads disposed on the upper surface of said first substrate layer;
(f) a plurality of plated-through holes formed through said first and second substrate layers and said thermally conductive layer, each of said plated-through holes connected between an associated on of said conductive pads and said first conductive layer;
(g) a polymer film disposed over the upper surface of said first substrate layer and said integrated circuit chips and having a plurality of via openings aligned with at least some of said bonding pads and aligned with at least some of said conductive pads;
(h) a pattern of interconnection conductors disposed on the upper surface of said polymer film so as to extend between at least some of said openings to provide electrical connections between at least some of said bonding pads and at least some of said conductive pads;
and
(i) an input/output connector supported by said first and second substrate layers for interfacing between select ones of said conductive pads and an external system to allow electrical signals to pass therebetween, said input/output connector removably interfaced with said external system.

7 more elements

Dependencies are inferred from the claim text.

Multi-chip integrated circuit module

Life of this patent

Multi-chip integrated circuit module

Life of this patent

Abstract

Claims21