G11C 29/56008
Error analysis, representation of errors
Official title: {Error analysis, representation of errors}
G11C29/56008 (Error analysis, representation of errors) appears on 398 US grants and 442 published applications in this corpus.
Search patents in G11C- Granted patents
- 398
- Published applications
- 442
- Assignees
- 145
- Inventors
- 917
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1999 | 1 | 0 |
| 2000 | 2 | 0 |
| 2001 | 1 | 0 |
| 2002 | 2 | 0 |
| 2003 | 0 | 2 |
| 2004 | 0 | 2 |
| 2005 | 3 | 8 |
| 2006 | 6 | 9 |
| 2007 | 4 | 22 |
| 2008 | 17 | 23 |
| 2009 | 16 | 14 |
| 2010 | 19 | 12 |
| 2011 | 13 | 13 |
| 2012 | 11 | 22 |
| 2013 | 11 | 17 |
| 2014 | 16 | 17 |
| 2015 | 24 | 19 |
| 2016 | 22 | 32 |
| 2017 | 26 | 23 |
| 2018 | 14 | 10 |
| 2019 | 22 | 23 |
| 2020 | 25 | 28 |
| 2021 | 22 | 22 |
| 2022 | 29 | 33 |
| 2023 | 27 | 17 |
| 2024 | 24 | 39 |
| 2025 | 26 | 25 |
| 2026 | 15 | 10 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Cascade model for determining read level voltage offsets based on wordline group memory cells29 Sep 2026US 12,749,541 B2Micron Technology, Inc.
- Memory device including damage detection circuit and test system including the memory device11 Aug 2026US 12,706,171 B2Samsung Electronics Co., Ltd.
- Memory device including repair circuit and operating method thereof28 Jul 2026US 12,694,945 B2Samsung Electronics Co., Ltd.
- Technique to analyze and report accurate data, synchronizing multiple signals in a memory chip23 Jun 2026US 12,665,044 B2Tektronix, Inc.
- Method for performing aging test on semiconductor used for neural network16 Jun 2026US 12,658,280 B2Deepx Co., Ltd.
- Method of setting signal drive strength of storage13 Aug 2026US 2026/0237453 A1Atp Electronics Taiwan Inc.
- Memory Fault Prediction Method and Apparatus, Chip, Device, and Storage Medium6 Aug 2026US 2026/0228070 A1Huawei Technologies Co., Ltd.
- Defect detection method for memory device2 Jul 2026US 2026/0188406 A1Powerchip Semiconductor Manufacturing Corporation
- Semiconductor device, control method for semiconductor device and control program25 Jun 2026US 2026/0179714 A1Renesas Electronics Corporation
- Flash memory quality grading method, flash memory quality grading apparatus, and non-transitory computer-readable storage medium14 May 2026US 2026/0134936 A1Hosin Global Electronics Co., LTD
Most cited
By later US patents
- Method and computer program for efficient cell failure rate estimation in cell arrays118US 7,380,225 B2International Business Machines Corporation · 2008
- In-line voltage contrast determination of tunnel oxide weakness in integrated circuit technology development81US 7,101,722 B1Advanced Micro Devices, Inc. · 2006
- Adaptive redundancy in three dimensional memory76US 9,015,561 B1SanDisk Technologies LLC · 2015
- Method and system for performing built-in self-test routines using an accumulator to store fault information40US 7,260,758 B1LSI Corporation · 2007
- Operating voltage tuning method for static random access memory37US 7,715,260 B1United Microelectronics Corp. · 2010