G11C 16/3445

Circuits or methods to verify correct erasure of nonvolatile memory cells

Official title: {Circuits or methods to verify correct erasure of nonvolatile memory cells}

G11C16/3445 (Circuits or methods to verify correct erasure of nonvolatile memory cells) appears on 1,274 US grants and 1,106 published applications in this corpus.

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Granted patents
1,274
Published applications
1,106
Assignees
169
Inventors
1,515
Latest grant
6 Oct 2026

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G11C 16/3445: granted patents and published applications per publication year
YearGranted patentsPublished applications
198610
198700
198800
198930
199000
199110
199220
199300
199460
1995140
1996220
1997300
1998220
1999360
2000280
2001328
20023831
20033139
20041824
20053126
20062739
20073441
20083927
20093022
20101712
20112531
20122525
20132627
20142748
20155050
20167969
20176650
20185248
20195974
20207472
20217355
20225968
20236171
20245561
20254848
20263340

By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.

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