Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state

A method of programming a plurality of non-volatile memory cells to respective predetermined states, comprising:

• applying one or more programming pulses simultaneously to respective of said memory cells so as to program said memory cells to said respective predetermined states, said programming pulses having respective programming voltages gradually raised up;
• determining which of given memory cells to which a programming pulse has been applied have been successfully programmed to said respective predetermined states;
• and
• terminating application of a programming pulse to each of said given memory cells determined to have been successfully programmed to said predetermined state bit-by-bit.

A method of erasing a non-volatile memory cell, comprising:

• applying one or more erasing pulses to said memory cell so as to erase said memory cell, each erasing pulse having an erasing voltage gradually raised up, and being divided into plurality of sub-pulses;
• determining whether said memory cell has been successfully erased;
• and
• terminating application of said erasing pulse to said memory cell when it is determined that said memory cell has been successfully erased to a predetermined state;
• wherein a first pulse of said plurality of sub-pulses has a first pulse duration and pulse durations of remaining subsequent sub-pulses are shorter than said first pulse duration.

A method of erasing a plurality of non-volatile memory cells, comprising:

• applying erasing pulses simultaneously to respective of said memory cells so as to erase said memory cells, said erasing pulses each having an erasing voltage gradually raised up;
• determining which of given memory cells to which an erasing pulse was applied have been successfully erased;
• and
• terminating application of erasing pulses to each given memory cell when it is determined that the respective given memory cell has been successfully erased bit-by-bit.

A non-volatile semiconductor memory device comprising:

• a semiconductor substrate;
• a plurality of bitlines;
• a plurality of word lines insulatively intersecting said bitlines;
• a memory cell array comprising a plurality of memory cells coupled to said bitlines and said word lines, each memory cell including a transistor with a charge storage portion;
• and
• a plurality of programming circuits coupled to said memory cell array, for storing control data which define whether or not programming pulses are to be applied to respective of said memory cells, said programming pulses having respective programming voltages gradually raised up, for applying said programming pulses to respective of said memory cells according to the control data stored by said programming circuits, and for selectively modifying said stored control data in order to apply said programming pulses only to memory cells in which it has been determined that data has not been successfully programmed.