G11C 16/3436
Arrangements for verifying correct programming or erasure
Official title: {Arrangements for verifying correct programming or erasure}
G11C16/3436 (Arrangements for verifying correct programming or erasure) appears on 5,967 US grants and 5,806 published applications in this corpus.
Search patents in G11C- Granted patents
- 5,967
- Published applications
- 5,806
- Assignees
- 424
- Inventors
- 4,357
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 1 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 1 | 0 |
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 1 | 0 |
| 1987 | 0 | 0 |
| 1988 | 1 | 0 |
| 1989 | 8 | 0 |
| 1990 | 3 | 0 |
| 1991 | 3 | 0 |
| 1992 | 7 | 0 |
| 1993 | 6 | 0 |
| 1994 | 17 | 0 |
| 1995 | 28 | 0 |
| 1996 | 44 | 0 |
| 1997 | 52 | 0 |
| 1998 | 65 | 0 |
| 1999 | 74 | 0 |
| 2000 | 86 | 0 |
| 2001 | 89 | 40 |
| 2002 | 108 | 101 |
| 2003 | 109 | 131 |
| 2004 | 87 | 134 |
| 2005 | 129 | 159 |
| 2006 | 144 | 185 |
| 2007 | 190 | 215 |
| 2008 | 183 | 222 |
| 2009 | 191 | 176 |
| 2010 | 165 | 179 |
| 2011 | 185 | 180 |
| 2012 | 181 | 203 |
| 2013 | 207 | 192 |
| 2014 | 225 | 231 |
| 2015 | 232 | 209 |
| 2016 | 299 | 259 |
| 2017 | 269 | 215 |
| 2018 | 238 | 224 |
| 2019 | 267 | 294 |
| 2020 | 337 | 322 |
| 2021 | 303 | 316 |
| 2022 | 311 | 371 |
| 2023 | 291 | 375 |
| 2024 | 324 | 364 |
| 2025 | 306 | 285 |
| 2026 | 198 | 224 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Architecture and method for NAND memory operation6 Oct 2026US 12,755,794 B2Yangtze Memory Technologies Co., Ltd.
- Enhanced read retry (ERR) for data recovery in flash memory6 Oct 2026US 12,755,797 B2SanDisk Technologies LLC
- Memory, operation method thereof, and memory system6 Oct 2026US 12,755,801 B2Yangtze Memory Technologies Co., Ltd.
- Memory device, memory system including the same, and operating method of the memory device29 Sep 2026US 12,749,535 B2Samsung Electronics Co., Ltd.
- Memory device and method of operating the memory device29 Sep 2026US 12,749,539 B2SK hynix Inc.
- Alternative erase schemes for reliability-risk word lines8 Oct 2026US 2026/0311777 A1Micron Technology, Inc.
- Advanced dummy word line ramp down after program verify for memory devices8 Oct 2026US 2026/0311778 A1SanDisk Technologies LLC
- Semiconductor device, operating method thereof, and in-memory computing apparatus8 Oct 2026US 2026/0311779 A1CCSH Corporation
- Semiconductor device and operation method thereof, system, and electronic device8 Oct 2026US 2026/0311780 A1CCSH Corporation
- Operating method of memory device8 Oct 2026US 2026/0311781 A1SK hynix Inc.
Most cited
By later US patents
- Multi-state EEprom read and write circuits and techniques1,175US 5,172,338 ASunDisk Corporation · 1992
- Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states791US 6,522,580 B2SanDisk Corporation · 2003
- Variable programming of non-volatile memory725US 7,020,017 B2SanDisk Corporation · 2006
- Nonvolatile memory device, operating method thereof and memory system including the same633US 8,559,235 B2Samsung Electronics Co., Ltd. · 2013
- Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state625US 5,774,397 AKabushiki Kaisha Toshiba · 1998