Partial block erase operations in memory devices
AssigneeMicron Technology, Inc.
InventorsViolante Moschiano, Shyam Sunder Raghunathan, Haiou Che, Walter di Francesco
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AssigneeMicron Technology, Inc.
InventorsViolante Moschiano, Shyam Sunder Raghunathan, Haiou Che, Walter di Francesco
Estimating the term…
Described are systems and methods for performing partial block erase operations. An example memory device comprises: a memory array comprising a plurality of memory cells electrically coupled to a plurality of wordlines; and a controller coupled to the memory array, the controller to perform operations comprising: identifying, in a memory device, a block comprising a plurality of memory cells; estimating, in the block, a number of pages having a predefined program state; determining, based on the number of pages having the predefined program state, an erase verify voltage to be applied to the block; causing an erase operation to be performed with respect to the block; and causing an erase verify operation to be performed, using the erase verify voltage, with respect to the block.
A memory device, comprising:
A computer-readable non-transitory storage medium comprising executable instructions that, when executed by a processing device, cause the processing device to perform operations, comprising:
A method, comprising:
Dependencies are inferred from the claim text.