G01R 31/31855
Interconnection testing
Official title: {Interconnection testing, e.g. crosstalk, shortcircuits}
G01R31/31855 (Interconnection testing) appears on 152 US grants and 116 published applications in this corpus.
Search patents in G01R- Granted patents
- 152
- Published applications
- 116
- Assignees
- 71
- Inventors
- 309
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1984 | 1 | 0 |
| 1985 | 2 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 0 | 0 |
| 1991 | 1 | 0 |
| 1992 | 1 | 0 |
| 1993 | 2 | 0 |
| 1994 | 2 | 0 |
| 1995 | 3 | 0 |
| 1996 | 1 | 0 |
| 1997 | 7 | 0 |
| 1998 | 5 | 0 |
| 1999 | 3 | 0 |
| 2000 | 4 | 0 |
| 2001 | 2 | 0 |
| 2002 | 1 | 3 |
| 2003 | 4 | 2 |
| 2004 | 7 | 13 |
| 2005 | 3 | 7 |
| 2006 | 13 | 9 |
| 2007 | 5 | 9 |
| 2008 | 5 | 7 |
| 2009 | 7 | 3 |
| 2010 | 7 | 3 |
| 2011 | 6 | 6 |
| 2012 | 3 | 8 |
| 2013 | 6 | 3 |
| 2014 | 7 | 4 |
| 2015 | 4 | 10 |
| 2016 | 6 | 4 |
| 2017 | 7 | 5 |
| 2018 | 5 | 3 |
| 2019 | 3 | 3 |
| 2020 | 3 | 1 |
| 2021 | 3 | 1 |
| 2022 | 1 | 1 |
| 2023 | 0 | 3 |
| 2024 | 8 | 1 |
| 2025 | 1 | 4 |
| 2026 | 1 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Secure scan testing of integrated circuits25 Aug 2026US 12,716,945 B2SK hynix Inc.
- Scan chain formation for improving chain resolution22 Apr 2025US 12,282,063 B1Synopsys, Inc.
- Bi-directional scan flip-flop circuit and method10 Dec 2024US 12,166,487 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Scan testing in a processor12 Nov 2024US 12,140,629 B2Graphcore Limited
- Integrated test circuit, test assembly and method for testing an integrated circuit6 Aug 2024US 12,055,587 B2Infineon Technologies AG
- Memory device configured for detecting a connection failure between signal paths27 Aug 2026US 2026/0251712 A1SK hynix Inc.
- Semiconductor device for performing test operation of through-silicon vias13 Aug 2026US 2026/0235677 A1Samsung Electronics Co., Ltd.
- Secure scan testing of integrated circuits28 May 2026US 2026/0147041 A1SK hynix Inc.
- Bi-directional scan flip-flop circuit and method27 Nov 2025US 2025/0364976 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Bi-directional scan flip-flop circuit and method20 Mar 2025US 2025/0096783 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Structure and method for producing mask-programmed integrated circuits which are pin compatible substitutes for memory-configured logic arrays223US 5,068,603 AXilinx, Inc. · 1991
- Method and apparatus for evaluating and optimizing a signaling system146US 7,490,275 B2Rambus Inc. · 2009
- Method and apparatus for high-speed interconnect testing83US 6,000,051 ALogic Vision, Inc. · 1999
- Testing system interconnections using dynamic configuration and test generation76US 5,617,430 AInternational Business Machines Corporation · 1997
- Circuit arrangement which permits the testing of each individual chip and interchip connection in a high density packaging structure having a plurality of interconnected chips, without any physical disconnection73US 4,441,075 AInternational Business Machines Corporation · 1984