G01R 31/318342
By preliminary fault modelling
Official title: {by preliminary fault modelling, e.g. analysis, simulation}
G01R31/318342 (By preliminary fault modelling) appears on 821 US grants and 609 published applications in this corpus.
Search patents in G01R- Granted patents
- 821
- Published applications
- 609
- Assignees
- 283
- Inventors
- 1,704
- Latest grant
- 1 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 2 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 1 | 0 |
| 1987 | 2 | 0 |
| 1988 | 4 | 0 |
| 1989 | 1 | 0 |
| 1990 | 3 | 0 |
| 1991 | 2 | 0 |
| 1992 | 1 | 0 |
| 1993 | 2 | 0 |
| 1994 | 11 | 0 |
| 1995 | 18 | 0 |
| 1996 | 29 | 0 |
| 1997 | 20 | 0 |
| 1998 | 19 | 0 |
| 1999 | 20 | 0 |
| 2000 | 26 | 0 |
| 2001 | 24 | 5 |
| 2002 | 23 | 33 |
| 2003 | 39 | 49 |
| 2004 | 46 | 58 |
| 2005 | 41 | 42 |
| 2006 | 45 | 36 |
| 2007 | 35 | 40 |
| 2008 | 39 | 43 |
| 2009 | 29 | 34 |
| 2010 | 26 | 22 |
| 2011 | 34 | 15 |
| 2012 | 29 | 14 |
| 2013 | 22 | 21 |
| 2014 | 21 | 7 |
| 2015 | 15 | 15 |
| 2016 | 13 | 13 |
| 2017 | 14 | 6 |
| 2018 | 12 | 15 |
| 2019 | 18 | 32 |
| 2020 | 24 | 21 |
| 2021 | 26 | 22 |
| 2022 | 27 | 26 |
| 2023 | 26 | 14 |
| 2024 | 16 | 11 |
| 2025 | 11 | 8 |
| 2026 | 4 | 7 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Seamless universal verification methodology1 Sep 2026US 12,724,070 B1Amazon Technologies, Inc.
- Electronic circuit simulation based on random telegraph signal noise25 Aug 2026US 12,716,932 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Machine-learning-based integrated circuit test case selection16 Jun 2026US 12,657,364 B2QUALCOMM Incorporated
- Fault diagnostics16 Jun 2026US 12,657,365 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Computing devices for predicting electrical tests, electrical test prediction apparatuses having the same, and operating methods thereof2 Dec 2025US 12,487,272 B2Samsung Electronics Co., Ltd.
- Method for one-step aging simulation of a transistor dynamically stressed during operation2 Jul 2026US 2026/0186043 A1
- Battery voltage simulation circuit, battery voltage simulation system and power battery training apparatus including same25 Jun 2026US 2026/0177636 A1Contemporary Amperex Technology Co., Limited
- Multicast-based testbench for device testing7 May 2026US 2026/0126486 A1Toyota Jidosha Kabushiki Kaisha
- Power regulator monitoring circuit, power regulator system, and method of monitoring a power regulator23 Apr 2026US 2026/0110733 A1Infineon Technologies AG
- Scandump simulation and co-simulation for device testing2 Apr 2026US 2026/0092965 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information324US 5,801,958 ALSI Logic Corporation · 1998
- Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation252US 5,544,067 ALSI Logic Corporation · 1996
- Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information226US 5,555,201 ALSI Logic Corporation · 1996
- System and method for creating and validating structural description of electronic system219US 5,623,418 ALSI Logic Corporation · 1997
- Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models183US 5,933,356 ALSI Logic Corporation · 1999