Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models

A constraint analyzer for use in a system for creating and validating a structural device or circuit in a multi-windowing graphical user interface (GUI) environment, comprising:

• means for receiving library data and a gate-level netlist;
• means for receiving information including a VHDL representation of the device or circuit;
• and
• a gate level power analysis tool for exploring device or circuit power design tradeoffs based on library data, the gate level netlist, and the VHDL representation of the circuit or device.

A method for creating and validating a structural description of a circuit or device from a VHDL description of the circuit or device, comprising the steps of:

• compiling the VHDL description of the circuit or device;
• locating problems within said compiled description and measuring the effectiveness of solving said problems;
• passing information including said compiled description to a physical design level;
• receiving said information and creating a physic design therefrom;
• and
• back annotating information from the physical design tool to the compiler.

A method of creating and validating an electronic design from a behavioral description thereof, comprising the steps of:

• providing a behavioral description of the electronic design;
• simulating and changing the behavioral description of the design;
• partitioning the behavioral description into a number of blocks and constraining the architectural choices to those meeting high-level timing goals;
• and
• creating a physical design by iteratively feeding back physical design characteristics to the behavioral level.

A system for creating and validating an electronic design from a behavioral description thereof, comprising:

• a simulation tool for simulating and changing the behavioral description of the design;
• a partitioning tool for partitioning the behavioral description into a number of blocks and constraining the architectural choices to those meeting high-level timing goals;
• and
• a physical design tool creating a physical design by iteratively feeding back physical design characteristics to the behavioral level.