US 5,544,067 A · Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation

Abstract

A system for interactive design, synthesis and simulation of an electronic system allowing a user to design a system either by specification of a behavioral model in a high level language such as VHDL or by graphical entry. The user can view full or partial simulation and design results simultaneously, on a single display window. The synthesis process uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is generally a series of transformations operating upon various levels of design representations. At each level, the design can be simulated and reviewed in schematic diagram form. The simulation results can be displayed immediately adjacent to signal lines on the diagram to which they correspond. In one embodiment, design rule violations are processed by an expert system to suggest possible corrections or alterations to the design which will eliminate the design rule violations. Schematic diagram and simulation displays showing those portions of the electronic system and simulated signal patterns which are related to the design rule violations are used to help the user identify and appropriately correct problems in the design.

Claims31

Dependent claims

In an ECAD system, a method of creating and validating a structural description of an electronic system from a higher level, behavior-oriented description thereof, comprising:

entering on an ECAD system a specification for a design of desired behavior of an electronic system, including high-level timing goals, in a high-level, behavior-oriented language;
on the ECAD system, iteratively simulating and changing the design of the electronic system at the behavioral-level until the desired behavior is obtained;
on the ECAD system, displaying the design of at least a portion the electronic system as a plurality of graphical objects forming a schematic diagram and simultaneously displaying simulation data on the schematic diagram adjacent to graphical objects to which the simulation data applies;
on the ECAD system, partitioning the design of the device into a number of architectural blocks and constraining the architectural choices to those which meet the high-level timing goals;
and
on the ECAD system, directing the various architectural blocks to logic synthesis programs, said logic synthesis programs also running in the ECAD system, thereby providing a netlist or gate-level description of the design.

3 more elements

In an ECAD system, a method of deriving a structural description of an electronic system from a behavioral description thereof, comprising:

(a) specifying a behavioral design for an electronic system in a high-level, behavior-oriented language;
(b) describing, in the high-level language, a functional description of the design of the electronic system, and inputting the functional description to the ECAD system;
(c) verifying in the high-level language, correctness of intended functionality and, if necessary, iteratively simulating and changing the functional description of the electronic system until the desired functionality is obtained;
(d) on the ECAD system, partitioning the functional description into a number of architectural blocks;
(e) on the ECAD system, constraining the architectural choices for the design to those which meet the desired behavior;
(f) on the ECAD system, mapping the architecturally constrained design into a structural description of the electronic system;
and
(g) on the ECAD system, displaying the at least a portion of the design as a plurality of interconnected graphical objects forming a schematic diagram and simultaneously displaying simulation data on the schematic diagram adjacent to graphical objects to which the simulation data applies.

5 more elements

In an ECAD system, a method of creating and validating a structural description of an electronic system from a behavior-oriented description, comprising:

specifying a behavioral description for a desired behavior of an electronic system in a high-level, behavior-oriented language, and inputting the behavioral description to an ECAD system;
on the ECAD system, iteratively simulating and changing the behavioral description until the desired behavior is obtained;
on the ECAD system, partitioning the behavioral description into architectural blocks;
on the ECAD system, synthesizing a structural description of the architectural blocks in a lower-level language;
and
on the ECAD system, simulating the functionality of the structural description, representing at least a portion of the structural description as a schematic diagram, displaying the schematic diagram on a graphics display device, and displaying simulation data on the schematic diagram.

3 more elements

An ECAD system for creating and validating a structural description of an electronic system from a higher level, behavior-oriented description thereof, comprising:

means for entering on an ECAD system a specification for a design of desired behavior of an electronic system, including high-level timing goals, in a high-level, behavior-oriented language;
means, in the ECAD system, for iteratively simulating and changing the design of the electronic system at the behavioral-level until the desired behavior is obtained;
means, in the ECAD system, for partitioning the design of the electronic system into a number of architectural blocks and for constraining the architectural choices to those which meet the high-level timing goals;
means, in the ECAD system, for directing the various architectural blocks to logic synthesis programs, said logic synthesis programs also running in the ECAD system, thereby providing a netlist or gate-level description of the design;
and
means, in the ECAD system, for simultaneously displaying an electronic circuit diagram and simulation data.

3 more elements

An interactive schematic design and simulation system comprising:

a computer processor, including means for storing graphical objects;
graphical display means, connected to said computer processor, for displaying the graphical objects;
a portion of said graphical objects being pre-defined graphical objects accessible to said computer processor, each representing a particular schematic symbol, and each having a plurality of input and/or output nodes to which input and/or output signals may be associated;
means for graphically indicating interconnections (nets) between said input and output nodes of said graphical objects on said graphical display means;
means for enabling a problem solving user to manipulate or arrange said pre-defined graphical objects on said graphical display means in the form of a schematic diagram of an electronic system, such that said schematic diagram may be viewed on said graphic display means either in whole or in part;
and
means for enabling the problem solving user to create, delete or modify said graphical indications of interconnections between said graphical objects;
wherein:
the computer processor further includes:
a plurality of executable simulation models;
means for representing the state of interconnections between said graphical objects in the form of a net-list;
means for representing the state of interconnections between said graphical objects in the form of signal paths between simulation models;
means for specifying a signal state on any input or output node of said graphical objects;
means for specifying a signal state on any of said graphical interconnections (nets) between said input and output nodes of said graphical objects whereby said signal state is simultaneously applied to all input and output nodes connected thereto;
means for specifying an identified portion of said schematic diagram to be simulated;
means for specifying a simulation duration in the form a starting condition, or for specifying starting conditions and a stopping condition, or for specifying stopping conditions;
means for executing a simulation of the identified portion of said schematic diagram according to said starting and stopping conditions;
and
means for displaying, on said schematic diagram on said graphical display means, the end states of said simulation such that the state data corresponding to the output nodes of each of said graphical objects is displayed adjacent thereto and for displaying on said graphical display means real-time timing information and net values, and for displaying on said graphical display means the input, output and results of the simulation.

16 more elements

Dependencies are inferred from the claim text.

Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation

Life of this patent

Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation

Life of this patent

Abstract

Claims31