Electronic circuit simulation based on random telegraph signal noise

A non-transitory computer-readable medium storing instructions, the instructions comprising:

• one or more instructions that, when executed by one or more processors, cause the one or more processors to:
• obtain a standalone random telegraph signal (RTS) noise model and a transistor model using a model interface application programing interface (API),
• wherein the standalone RTS noise model comprises:
• a time domain component defining one or more expected transitions between two or more discrete voltage levels for each of a plurality of transistors included in an electronic circuit over a time duration, and
• a frequency domain component identifying a drain current spectral density over a frequency range for each of the plurality of transistors over the time duration, wherein the drain current spectral density is based on at least two of:
• a simulation parameter for a respective transistor of the plurality of transistors, a frequency for the respective transistor, or a cutoff frequency for respective transistor, and
• wherein the transistor model is associated with simulating a performance of each of the plurality of transistors for stress-effect modeling of the plurality of transistors;
• configure, using the standalone RTS noise model and transistor model, an RTS noise generator for each of the plurality of transistors;
• generate, using the RTS noise generator in an electronic circuit simulator, respective simulated RTS noise inputs to each of the plurality of transistors;
• determine, based on the respective simulated RTS noise inputs, respective simulated output signals from each of the plurality of transistors;
• determine, by the one or more processors, that at least one of the respective simulated output signals does not satisfy a threshold tolerance;
• and
• automatically modify, by the one or more processors and based on determining that the at least one of the respective simulated output signals does not satisfy the threshold tolerance, the electronic circuit to satisfy the threshold tolerance,
• wherein the one or more instructions, that cause the one or more processors to automatically modify the electronic circuit based on the respective simulated output signal, cause the one or more processors to:
• rearrange or replace one or more components, including the plurality of transistors, included in the electronic circuit,
• add the one or more components to the electronic circuit,
• remove the one or more components included in the electronic circuit, or
• shorten, lengthen, or reroute electrical traces between two or more components, including the one or more components, included in the electronic circuit.

A circuit simulator device, comprising:

• an electronic circuit simulator component;
• and
• a model interface application programming interface (API) component, wherein the electronic circuit simulator component is to:
• receive information identifying an electronic circuit;
• cause the model interface API component to obtain a standalone random telegraph signal (RTS) noise model and a transistor model to provide the standalone RTS noise model and the standalone RTS noise model to the electronic circuit simulator component, wherein the standalone RTS noise model comprises a frequency domain component identifying a drain current spectral density over a frequency range, wherein the drain current spectral density is based on at least two of:
• a simulation parameter for a transistor included in the electronic circuit, a frequency of the transistor, or a cutoff frequency of the transistor, and wherein the transistor model is associated with simulating a performance of the transistor for stress-effect modeling of the transistor;
• configure, based on the standalone RTS noise model and transistor model, an RTS noise generator for the transistor;
• insert the RTS noise generator in the electronic circuit, wherein the RTS noise generator is inserted as an input to a gate of the transistor;
• perform an RTS noise simulation of the electronic circuit to simulate an output from a drain of the transistor based on the RTS noise generator,
• wherein the RTS noise simulation includes:
• using different combinations of a plurality of simulation parameters, including the simulation parameter, associated with the transistor, or
• using different values for the plurality of simulation parameters associated with the transistor;
• and
• automatically modify the electronic circuit based on the output to reduce expected RTS noise effects of the electronic circuit,
• wherein, to automatically modify the electronic circuit, the electronic circuit simulator component is to perform at least one of:
• rearrange or replace one or more components, including the transistor, included in the electronic circuit,
• add the one or more components to the electronic circuit,
• remove the one or more components included in the electronic circuit, or
• shorten, lengthen, or reroute electrical traces between two or more components, including the one or more components, included in the electronic circuit.