Power regulator monitoring circuit, power regulator system, and method of monitoring a power regulator

Abstract

A power regulator monitoring circuit is provided. The power regulator monitoring circuit includes on a chip: a digital voltage monitor configured to take a sequence of measurements of an output voltage of a power regulator during a deterministic load increase and to provide the sequence of digital output voltage measurement values; a processing unit configured to receive and process the sequence of digital output voltage measurement values for determining at least one parameter of the power regulator that is indicative of a health state of the power regulator; and a memory storing instructions to be executed by the processing unit and/or by a further processor that is connected to the power regulator monitoring circuit, wherein the instructions stored in the memory are arranged to cause a deterministic load increase of the power regulator when the instructions are run on the processing unit and/or on the further processor.

Dependencies are inferred from the claim text.