G01R 31/31835
Analysis of test coverage or failure detectability
Official title: {Analysis of test coverage or failure detectability}
G01R31/31835 (Analysis of test coverage or failure detectability) appears on 211 US grants and 178 published applications in this corpus.
Search patents in G01R- Granted patents
- 211
- Published applications
- 178
- Assignees
- 103
- Inventors
- 491
- Latest grant
- 16 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1990 | 2 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 1 | 0 |
| 1997 | 2 | 0 |
| 1998 | 5 | 0 |
| 1999 | 6 | 0 |
| 2000 | 8 | 0 |
| 2001 | 4 | 2 |
| 2002 | 2 | 7 |
| 2003 | 11 | 6 |
| 2004 | 9 | 16 |
| 2005 | 11 | 11 |
| 2006 | 8 | 13 |
| 2007 | 11 | 8 |
| 2008 | 10 | 6 |
| 2009 | 6 | 10 |
| 2010 | 3 | 8 |
| 2011 | 13 | 6 |
| 2012 | 7 | 3 |
| 2013 | 8 | 6 |
| 2014 | 3 | 2 |
| 2015 | 4 | 8 |
| 2016 | 5 | 5 |
| 2017 | 6 | 4 |
| 2018 | 9 | 3 |
| 2019 | 8 | 15 |
| 2020 | 6 | 6 |
| 2021 | 12 | 9 |
| 2022 | 12 | 13 |
| 2023 | 5 | 4 |
| 2024 | 8 | 4 |
| 2025 | 5 | 1 |
| 2026 | 1 | 2 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Machine-learning-based integrated circuit test case selection16 Jun 2026US 12,657,364 B2QUALCOMM Incorporated
- Method for semiconductor device interface circuitry functionality and compliance testing15 Jul 2025US 12,360,162 B2Celerint, LLC
- Automatic test pattern generation-based circuit verification method and apparatus27 May 2025US 12,313,680 B2Huawei Technologies Co., Ltd.
- Identifying defect sensitive codes for testing devices with input or output code27 May 2025US 12,313,681 B2Texas Instruments Incorporated
- System and method for optimizing fault coverage based on optimized test point insertion determinations for logical circuits20 May 2025US 12,306,247 B2Auburn University
- Power regulator monitoring circuit, power regulator system, and method of monitoring a power regulator23 Apr 2026US 2026/0110733 A1Infineon Technologies AG
- Test pattern generating method and device1 Jan 2026US 2026/0002991 A1Samsung Electronics Co., Ltd.
- Forced early failure for memory device15 May 2025US 2025/0155493 A1SMART Modular Technologies, Inc.
- Verification method and verification device21 Nov 2024US 2024/0385240 A1Realtek Semiconductor Corp.
- Method for semiconductor device interface circuitry functionality and compliance testing31 Oct 2024US 2024/0361386 A1Celerint, LLC
Most cited
By later US patents
- Systems, methods and computer program products for prediction of defect-related failures in integrated circuits143US 5,822,218 AClemson University · 1998
- Method and apparatus for inserting computer code into a high level language (HLL) software model of an electrical circuit to monitor test coverage of the software model when exposed to test inputs124US 5,604,895 AMotorola, Inc. · 1997
- Automated analysis of a model based diagnostic system88US 5,922,079 AHewlett-Packard Company · 1999
- System and method for improving fault coverage of an electric circuit68US 5,748,497 ATexas Instruments Incorporated · 1998
- System and method for automated design verification68US 6,141,630 AVerisity Design, Inc. · 2000