Method for semiconductor device interface circuitry functionality and compliance testing
AssigneeCelerint, LLC
InventorsHoward H. Roberts, Jr., LeRoy Growt, Thomas Schoen
Life of this patent
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AssigneeCelerint, LLC
InventorsHoward H. Roberts, Jr., LeRoy Growt, Thomas Schoen
Estimating the term…
A method is provided for determining a decoupling capacitance of a device under test (DUT) interface circuitry, which is between automated testing equipment (ATE) and a DUT. The method: disconnects the DUT from the DUT interface circuitry; connects a Device Under Testing Power Supply (DPS) resource as a DUT Power Supply to the DUT interface circuitry; sets a current clamp of the DPS resource to a test application level; turns off the DPS resource voltage; sets the DPS resource to a force voltage mode; sets the current clamp to a minimum current level; turns on the output; waits a period of time to allow the decoupling capacitance to charge; places the DPS resource into a voltage measurement mode; adds any delay time to the period of time; measures the voltage before the capacitance is fully charged; and determines the decoupling capacitance.
A method for determining a decoupling capacitance C of a device under test interface circuitry, the device under test interface circuitry located between automated testing equipment (ATE) and a device under test (DUT), comprising:
Dependencies are inferred from the claim text.