Computing devices for predicting electrical tests, electrical test prediction apparatuses having the same, and operating methods thereof
AssigneeSamsung Electronics Co., Ltd.
InventorsSeyoung Park, Gwangnae Gil, Sola Woo, Jonghyun Lee
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Abstract
A method of operating an electrical test prediction apparatus includes determining a relationship between first electrical test (ET) data, corresponding to at least one shot region comprising a subset of a plurality of semiconductor chips of a wafer, and electrical die sorting (EDS) data, obtained by measuring a state of each chip on the wafer by a testing device, and predicting second ET data, corresponding to an region of the wafer other than the at least one shot region by performing machine learning on the relationship.
Claims19
A method comprising:
- determining a relationship between first electrical test (ET) data corresponding to at least one shot region comprising a subset of a plurality of semiconductor chips on a wafer, and electrical die sorting (EDS) data obtained, by a testing device, by measuring a state of each of the plurality of semiconductor chips on the wafer;
- and
- predicting second ET data corresponding to an unmeasured region of the wafer other than the at least one shot region, by performing machine learning on the relationship;
- and
- modifying one or more of an etching process, a flowable CVD process, and a CMP process for at least one of the plurality of semiconductor chips based on the first ET data, the EDS data, and the second ET data, wherein:
- each of the first ET data and the second ET data includes at least one electrical parameter associated with operation of semiconductor chips of the wafer.
An electrical test prediction apparatus comprising:
- a testing device configured to perform an electrical test on each of a plurality of shot regions of a wafer, each of the plurality of shot regions including at least one semiconductor chip;
- and
- a computing device configured to determine a relationship between first shot data measured from the testing device, and electrical die sorting (EDS) data obtained by measuring a state of each semiconductor chip on the wafer, configured to perform machine learning on the relationship, and configured to predict second shot data for semiconductor chips of a region of the wafer other than the plurality of shot regions using result values obtained by performing the machine learning, and configured to modify one or more of an etching process, a flowable CVD process, and a CMP process for one or more of the at least one semiconductor chip based on the first shot data, the EDS data, and the second shot data, wherein:
- each of the first shot data and the second shot data includes at least one electrical parameter of an individual device associated with operation of a semiconductor chip.
A computing device comprising:
- a processor configured to drive an electrical test (ET) prediction tool;
- and
- a memory configured to store electrical die sorting (EDS) data obtained from the ET prediction tool and a state of each of a plurality of semiconductor chips on a wafer, wherein:
- the ET prediction tool is configured to sample ET data measured from the wafer using a testing device, is configured to match the sampled ET data with a same EDS coordinates, is configured to perform machine learning on the matching ET data and the EDS data, is configured to predict overall ET data based on a result obtained by performing the machine learning, and is configured to modify one or more of an etching process, a flowable CVD process, and a CMP process for at least one of the plurality of semiconductor chips based on the sampled ET data, the EDS data, and the predicted ET data;
- and
- the ET data includes at least one electrical parameter of an individual device used in operation of a semiconductor chip.
Dependencies are inferred from the claim text.