H10W 90/284
Characterised by structural arrangements for measuring or testing
Official title: {characterised by structural arrangements for measuring or testing}
H10W90/284 (Characterised by structural arrangements for measuring or testing) appears on 771 US grants and 938 published applications in this corpus.
Search patents in H10W- Granted patents
- 771
- Published applications
- 938
- Assignees
- 187
- Inventors
- 1,391
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 2 | 0 |
| 1990 | 2 | 0 |
| 1991 | 9 | 0 |
| 1992 | 9 | 0 |
| 1993 | 5 | 0 |
| 1994 | 7 | 0 |
| 1995 | 9 | 0 |
| 1996 | 9 | 0 |
| 1997 | 8 | 0 |
| 1998 | 9 | 0 |
| 1999 | 8 | 0 |
| 2000 | 8 | 0 |
| 2001 | 7 | 3 |
| 2002 | 11 | 12 |
| 2003 | 8 | 14 |
| 2004 | 13 | 23 |
| 2005 | 9 | 21 |
| 2006 | 17 | 44 |
| 2007 | 21 | 56 |
| 2008 | 24 | 28 |
| 2009 | 22 | 25 |
| 2010 | 31 | 26 |
| 2011 | 42 | 38 |
| 2012 | 27 | 42 |
| 2013 | 27 | 33 |
| 2014 | 34 | 26 |
| 2015 | 37 | 46 |
| 2016 | 45 | 32 |
| 2017 | 41 | 42 |
| 2018 | 31 | 36 |
| 2019 | 37 | 44 |
| 2020 | 34 | 46 |
| 2021 | 43 | 46 |
| 2022 | 36 | 32 |
| 2023 | 33 | 31 |
| 2024 | 23 | 21 |
| 2025 | 23 | 43 |
| 2026 | 8 | 128 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor chip with stepped sidewall, semiconductor package including the same, and method of fabricating the same29 Sep 2026US 12,751,277 B2Samsung Electronics Co., Ltd.
- Wafer matching design method, wafer bonding structure and chip bonding structure1 Sep 2026US 12,727,486 B2Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.
- Semiconductor memory device23 Jun 2026US 12,667,025 B2Kioxia Corporation
- Semiconductor package and method of testing the same26 May 2026US 12,638,492 B2Samsung Electronics Co., Ltd.
- Semiconductor device and method of manufacturing the same26 May 2026US 12,642,057 B2Samsung Electronics Co., Ltd.
- Semiconductor memory device1 Oct 2026US 2026/0305470 A1Kioxia Corporation
- Method for manufacturing semiconductor device24 Sep 2026US 2026/0293757 A1Resonac Corporation
- Simultaneous Silicon Spring and Chip Singulation DRIE13 Aug 2026US 2026/0239987 A1
- High Current Column Grid Array Pillars13 Aug 2026US 2026/0240010 A1
- Stacked structure and design method of its bonding layer6 Aug 2026US 2026/0231737 A1Winbond Electronics Corp.
Most cited
By later US patents
- Methods of forming integrated circuit package1,886US 9,281,254 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Stacked semiconductor devices and methods of forming same1,870US 9,496,189 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Semiconductor chip assemblies with fan-in leads734US 5,148,265 AIST Associates, Inc. · 1992
- Semiconductor chip assemblies having interposer and flexible lead719US 5,148,266 AIST Associates, Inc. · 1992
- Three-dimensional integrated circuit and manufacturing method thereof617US 4,939,568 AFujitsu Limited · 1990