Wafer matching design method, wafer bonding structure and chip bonding structure
AssigneeWuhan Xinxin Semiconductor Manufacturing Co., Ltd.
InventorsBeibei Sheng, Sheng Hu, Tianjian Liu
Life of this patent
Estimating the term…
Loading patent…
AssigneeWuhan Xinxin Semiconductor Manufacturing Co., Ltd.
InventorsBeibei Sheng, Sheng Hu, Tianjian Liu
Estimating the term…
A method of design for matching of wafers, a wafer bonding structure and a chip bonding structure includes: providing a first wafer including unit arrays that each include at least two first dies; providing a second wafer including second dies that each cover at least one of the unit arrays, and the second dies matched in terms of performance with the first dies in the unit arrays that it covers. The first and second wafers are provided with corresponding alignment marks. With this application, two or more wafers with corresponding dies differing considerably in terms of shape or area can be designed to match each other and become suitable to be bonded together. This enables effective area utilization of, and better matching in terms of area and performance between, the dies, greatly shortens the development time of new products and adds great diversity and freedom to product design.
A method of design for matching of wafers, comprising:
A wafer bonding structure, comprising:
Dependencies are inferred from the claim text.